Emma Burrows did an excellent writeup of her SKI Combinator processor in 2009, <a href="http://cstein.kings.cam.ac.uk/~chris/part2/eb379.pdf" rel="nofollow">http://cstein.kings.cam.ac.uk/~chris/part2/eb379.pdf</a><p>See also the Reduceron2 <a href="https://www.cs.york.ac.uk/fp/darcs/reduceron2/_darcs/inventory" rel="nofollow">https://www.cs.york.ac.uk/fp/darcs/reduceron2/_darcs/invento...</a> which was designed to run Haskell directly in hardware.<p>It would be interesting to fuse this work with RISCV, <a href="http://riscv.org/" rel="nofollow">http://riscv.org/</a>
I love these 'compile to hardware' projects. Pity they didn't manage to get the speedup they hoped for from the parallel approach, curious how the next version benchmarks against this one.