The history of Artificial Intelligence goes back much further than the "early 1980s". It goes at least back to the conference at Dartmouth in 1956, if not back to Turing's 1950 paper, "Computing Machinery and Intelligence".
So what's changed that FPGA's are making a come back? They were all the rage in 2008/9...however that faded relatively quickly when people realized programming them was a hassle and that programming had direct implications to synthesizability/clock speed/area. Looks like Google Trends shows a downward spiral in interest from 2004 to present, so my intuition was close. OpenCL->HDL and Vivado's C/C++ -> HDL makes the process a bit easier, but it's still not as easy as writing optimized C code.<p>To get perf on an FPGA over a hard core you must go very wide (as in lots of parallelism). I suspect you could order custom hard cores from places like Tensilica and get far better perf/watt. I love FPGA's, they thrive on parallel integer/fixed point codes if enough time is put into designing the pipeline. It seems for most float heavy codes a hard core unit at a higher clock rate with a dedicated MMU is much better? Am I missing something that changes that?
It's excellent to see FPGAs being increasingly utilised.<p>As moore's law no longer holds true for CPU, there is increasing interest turning to FPGAs. You can create a truly bespoke Processor for any task.<p>Of course this is trade of between development time / cost vs processing needs of task.<p>I suspect FPGAs demand to only increse over the coming years. Intel's integration of FPGA into their line of processors is a promising step and sign of where things may be heading.
I had discussed this with some Deep Learning experts at the local University and they believed that FPGAs won't be as powerful as people seem to think since the many-many connections between blocks will not be up to the task.<p>In any event, Nerabus is a company (by the same guys as CodeThink) which is interested in running FPGA in the cloud: <a href="http://nerabus.com" rel="nofollow">http://nerabus.com</a> I'm not sure if they got off the ground with the idea or if they were too early or what.
Hi, chclau, I see you are the author and you are present in this comment thread.<p>Your post smells like spam. However, other posts on the same blog have content: <a href="https://fpgasite.wordpress.com/2016/08/09/pseudo-random-generator-tutorial/" rel="nofollow">https://fpgasite.wordpress.com/2016/08/09/pseudo-random-gene...</a><p>What's up? What is this blog for?
Note that as far as I'm aware all the custom FPGA solutions (and even Google's TPU which I think is ASIC) are really only being used for inference, and only "beat" GPUs on a efficiency basis.<p>That's interesting and useful, but the real bottleneck with deep learning is the training stage. AFAIK everyone is still doing that on GPUs.