The article doesn't make this clear, but this is an excellent example of an area where "pure research" and practical technology overlap. Free electron lasers are essentially particle accelerators (of the same sort used in, e.g., the LHC) with special configurations of magnets stuck on the end. They are large, expensive to build, and expensive to operate for essentially all the same reasons that research accelerators are. So advances in physics which lead to advances in accelerator technology, which allow further advances in pure physics, also directly impact the practicality of using FEL X-ray sources for imaging microchips (among other things).
Most of the problems with binging new digital ASICs to market have to do with the failure of -XRay-Lithography- EUV (now called Extreme UV) to provide fast enough exposures despite decades of development and billions in research investment. This is a hard problem, but quadruple patterning is also nasty and expensive at 7nm. Even if you can identify the error... if you can't make almost every one of a couple billion transistors correctly, you can't make a modern CPU.<p>I'd recommend reading a few recent articles on the topic:<p>The problem with lithography
<a href="http://spectrum.ieee.org/semiconductors/devices/leading-chipmakers-eye-euv-lithography-to-save-moores-law" rel="nofollow">http://spectrum.ieee.org/semiconductors/devices/leading-chip...</a><p>A depressing conclusion
<a href="https://www.hpcwire.com/2016/07/28/transistors-wont-shrink-beyond-2021-says-final-itrs-report/" rel="nofollow">https://www.hpcwire.com/2016/07/28/transistors-wont-shrink-b...</a><p>An optimistic expert
<a href="https://www.semiwiki.com/forum/content/6590-scott-jones-iss-talk-moores-law-lives.html" rel="nofollow">https://www.semiwiki.com/forum/content/6590-scott-jones-iss-...</a>
This could be useful to reverse-engineers who may want to do security verification (are there a hidden backdoors in this chip outside its specifications?) or to simply clone a chip outright.
I'm surprised lithography hasn't been replaced with something more nanoscale in origin like some kind of atomic deposition process where individual atoms are precisely bombarded onto the substrate to build up the features atom by atom.<p>It would take longer to manufacture each chip, but if the machines to do the deposition were relatively cheap and simple to construct, they're not that far off of electron beams, the result could be a massively parallel manufacturing process.
> Essentially, it takes a very long time to obtain each pattern, and you need a lot of patterns. By the time you've finished imaging, management has brought you your golden watch.<p>What does this last part about the golden watch mean? Is it a reference to retirement?
Pardon my ignorance, but would it be possible to use X-rays to read the contents of memory? Say, in a TPM or Secure Enclave? I feel like if you had an accurate enough beam you could detect if a memory cell is "charged" or not.
It's an article about a paper published in Nature about X-Ray tomography to image nm-scale features in modern ICs.<p>And the only image presented in the whole article is a completely unrelated Chipworks die shot at about 10um per pixel.