By that standard, there really isn't deterministic execution. You'll always want something that simply must be recorded, such as the current time.<p>A better distinction: deterministic execution is when you rerun the executed instructions, depending on predictable execution to avoid needing full snapshots for all possible stopping points.<p>By my definition, I've been on a team that has had it working for more than a decade. We built our own hypervisor in fact, purely for internal use. It has been a neat project, providing a lot of benefit to us. Along the way we have frequently had to fight CPU errata, and Intel flat out refuses to officially support the technology.<p>We're hiring: <a href="https://news.ycombinator.com/item?id=19797601" rel="nofollow">https://news.ycombinator.com/item?id=19797601</a><p>Overall, I think that deterministic execution is going to become important to many software developers.<p>An interesting issue is that the typical RISC CPU can not support this. RISC CPUs tend to use nondeterministic locking sequences, generally some variation of "load locked" and "store conditional". This design error is found in all instruction sets supported by ARM, MIPS, PowerPC, and RISC-V. Aside from the occasional errata glitch, Intel works fine. CISC wins.