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SiFive Announces First RISC-V OoO CPU Core

137 pointsby vanburenover 5 years ago

7 comments

baybal2over 5 years ago
&gt; SiFive’s design goals for the U8-Series are quite straightforward: Compared to an Arm Cortex-A72, the U8-Series aims to be comparable in performance, while offering 1.5x better power efficiency at the same time as using half the area.<p>This is very a big statement. It&#x27;s hard for me to think of how they do that, when 8th gen ARM cores are said to be blowing just anything else on size&#x2F;performance ratio.<p>Where does SiFive get such an expertise in size optimisation?
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jagger27over 5 years ago
&gt; A lot of the performance increases of the U8-series come thanks to the increased frequencies capabilities which are 1.4x higher this generation, with the core scaling up to 2.6GHz on 7nm.<p>Pretty cool that these chips are approaching performance parity so quickly.
fulafelover 5 years ago
&quot;IP Core&quot; in semi industry terminlogy means a bunch of RTL that is offered for licensing, so this is not yet a working chip.
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bcheungover 5 years ago
I wasn&#x27;t sure what OoO stood for and since they never mentioned it in the article I had to look it up. For anyone else who is asking the same question.<p>OoO = out of order execution
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mattnewportover 5 years ago
A Raspberry Pi type SBC based on this would be neat, is that something we can expect to see any time soon in light of this announcement or is that not an application this is really aimed at?
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monocasaover 5 years ago
Have we gotten confirmation yet on whether this is a BOOM core or not? It certainly feels like it is
yhvhover 5 years ago
Is there a risc-v chip on the market which includes Bluetooth?
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