Open hardware is relative. Most of these parts still require the xilinx or altera tools. Only the ice40 and ECP5 chips from lattice are really functional with an open source toolchain. I'm quite grateful to lattice for that, even if they had no part in it, they haven't been inhibiting the open source community's efforts.
> The bad part is that most of C/C++-compatible HLS tools are proprietary, and open source ones are either Scala-based (Chisel, SpinalHDL) or seem to be academic toy projects.<p>Why is Scala a problem?
> This enables a $37 part (XCA712T) to be able to fit over 3 Linux-worthy RISC-V processors running at 180 MHz, with 720 kB of block RAM available for caches, FIFOs, or anything else.<p>The $100 Alchitry Au has an XC7A35T and 256 MB of DDR3. Currently waiting for them to come back in stock, they're super neat and are open hardware. They're basically the successor to the Mojo V3.
I don't know a lot about this topic but I had an introduction class where we also covered FPGAs. The prof offering the class though is really sufficient in this topic and has developed this tool: <a href="https://github.com/esa-tu-darmstadt/tapasco/blob/master/README.md" rel="nofollow">https://github.com/esa-tu-darmstadt/tapasco/blob/master/READ...</a>
As you are saying it seems like just a science toy project but he was quite convinced that it already works pretty good and good enough for fourth-semesters to work with it.
The tool itself is a high level c++ tool-chain to develop for FPGAs.
You should definitely check it out :)<p>Then there's also Bluespec Verilog which has been open sourced not too long ago. It is way more abstract than Verilog or system Verilog and in comparison to them it's a pleasure to write in. But it's definitely not as high-level as C++.
I am waiting for FPGA to have it's arduino moment. I know there are attempts, but they all seem to not have achieved adequate depths to really dig in to the exciting parts of FPGA development
Thanks for the feedback, everyone!<p>I fixed up quite a few things based on it! I'll keep on working on the code and hopefully will have some more tangible to share at the end of the summer :)
The title suggested to me that they were looking for Linux/BSD drivers for IP within an FPGA, either connected to a CPU using PCIe or for an ARM/FPGA hybrid.