M1 chip has a bog standard Package-on-Package architecture - there is nothing special about it. The CoWoS and other 3D packaging technologies from TSMC's marketing pages aren't on the M1 chip. I believe there isn't even a silicon interposer due to cost presumably [1]. It is substrate on top of substrate (PoP) to connect the memory and CPU. CPU+GPU are on the same die which is pretty remarkable (Intel's IGPUs have been on the same die as well albeit they're not as powerful as M1s graphics) but that's somewhat unrelated to the packaging.<p>Here is a good diagram (sans the silicon interposer): <a href="https://www.researchgate.net/figure/3D-stacked-DRAM-example-High-Bandwidth-Memory-consists-of-stacked-memory-layers-four_fig5_320867388" rel="nofollow">https://www.researchgate.net/figure/3D-stacked-DRAM-example-...</a><p>Btw, memory has been stacked like that for a decade or more. Used to be stacked + wirebonded. But now, we have through-silicon vias (TSVs). The reason you can stack memory like that are many, one of them being thermals / power density.<p>[1] <a href="https://www.youtube.com/watch?v=t6KUnC-oU5g" rel="nofollow">https://www.youtube.com/watch?v=t6KUnC-oU5g</a>
Too bad they chose a name already taken by another very well established IC packaging technology : <a href="https://en.wikipedia.org/wiki/Small_outline_integrated_circuit" rel="nofollow">https://en.wikipedia.org/wiki/Small_outline_integrated_circu...</a>
It is like national security matter and relatively inexpensive when talking about nation's budget scale. Why countries don't make their own chips? Should this be in the realm of public companies just like healthcare or energy in some countries?
I wish all this technology were more accesible. but they gotta protect their trade secrets (I guess...).<p>I've heard about something called 'dycryl process' (in chip photolitography) but it is not the kind of info that it's easily found, nor easily understood even if I could google for it.