The claims here do seem a little suspicious, for one CoreMark is not the be all and end all of benchmarks, especially if you're trying to compare yourself against the M1 and other CPUs in a similar class. You need a far broader base of benchmarks for a decent comparison (for one thing CoreMark won't give the memory system much of a workout).<p>A big red flag is the Cortex-A9 comparison that is used, being described as the faster arm processor for CoreMark, if you go to to EEMBC's CoreMark score database (<a href="https://www.eembc.org/coremark/scores.php" rel="nofollow">https://www.eembc.org/coremark/scores.php</a>), search 'arm' a Cortex A9 part does indeed take top score. Note this are just user sumbitted scores without any real curation, searching 'arm' isn't guaranteed to give you all arm cores in the database, plus results could have errors in.<p>Given the age of the core (it was introduced in 2007) I'd be rather surprised if the A9 was the best performing arm core on CoreMark. Though From a quick google I can't find CoreMark numbers for other arm A-class cores.
Well a simple CPU is much more efficient then a complex one.<p>A modern AMD/intel uses very few gates to implement the arithmetic. we are talking ~1% of the gates actually do the work. The rest is taken up by Cashes, Schedulers, Branch predictors, Decoders, and a load of other stuff that is designed to speed up the CPU to get good single core performance. all this extra hardware takes up a lot of power.<p>Here is an interesting thought experiment:<p>On a large die you could (theoretically) today fit say one million Motorola 68000 Processors. If you clocked that at 5Ghz it would in theory be about 1000 times faster then a Ryzen 7 using the same power. But it would still mean that each core would be hundreds of times slower then a Ryzen core. It would be almost impossible to write programs that would utilize all one million cores effectively enough to make a program run faster on this hardware than it does on a Ryzen CPU.<p>Right now RISC-V is very simple this means it draws very little power. The problem is that it doesn't scale. The RISC-V instruction set is not one that makes it easy to add all the optimizations that one wants to add for a high performance CPU.<p>Its a bit like saying that an ant is more efficient than a bulldozer, yes, that's technically true, but trying to coordinating a million ants to build a road is a lot less efficient then just using a bulldozer.
Discussion from a few days ago: <a href="https://news.ycombinator.com/item?id=25262834" rel="nofollow">https://news.ycombinator.com/item?id=25262834</a>
> Who can do 25 cores in the mobile phone industry?<p>I'm actually curious why we have not seen many-core devices.
Typical desktop CPUs still only have 4-8 cores, as do mobile devices. (disregarding the many small hardware-management cores like SSD controllers, GPU management, modems, ...)<p>Why not have many more cores with different performance profiles, that then are dedicated to various tasks. Like a bunch of low power, in-order cores for background OS management or background apps like Slack that just check for new messages and send notifications, ...<p>Naively I would assume:<p>* the increased hardware complexity (wiring, caches, ...) makes this both cost and power budget prohibitive<p>* current operating systems are not really built for that world<p>* the benefits compared to current big/little designs with two hands full of cores are not worth the effort<p>Maybe someone knowledgable can offer more insight?
“For a typical 5W device, we can implement 25 cores. Who can do 25 cores in the mobile phone industry?”
I think he forgot to ask himself the really important question : who want 25 cores in a smartphone!
> Unlike Arm, the RISC-V Consortium does not compel disclosure of use. In 2021 we are likely to see many new RISC-V chips spring to life fully formed out of secret R&D labs.<p>Sigh. So much for the openness.
I read the EEtimes article[1] and find it surprising that they claim to beat the Apple M1. They don't say how, though...<p>[1] <a href="https://www.eetimes.com/micro-magic-risc-v-core-claims-to-beat-apple-m1-and-arm-cortex-a9/" rel="nofollow">https://www.eetimes.com/micro-magic-risc-v-core-claims-to-be...</a>
ZDNet has a bit more background [1].<p>[1] <a href="https://www.zdnet.com/article/risc-v-the-linux-of-the-chip-world-is-starting-to-produce-technological-breakthroughs/" rel="nofollow">https://www.zdnet.com/article/risc-v-the-linux-of-the-chip-w...</a>