It's also a nice Haiku platform - <a href="https://discuss.haiku-os.org/t/my-progress-on-real-risc-v-hardware/10963/31" rel="nofollow">https://discuss.haiku-os.org/t/my-progress-on-real-risc-v-ha...</a><p>However, the "HiFive Unmatched HW Reference Manual" mentioned on the SiFive web page (<a href="https://www.sifive.com/boards/hifive-unmatched" rel="nofollow">https://www.sifive.com/boards/hifive-unmatched</a>) is still not available, so bare-metal programming (or porting other operating systems) requires lots of Linux code reading.
I have two (<a href="https://rwmj.wordpress.com/2021/05/27/hifive-unmatched/" rel="nofollow">https://rwmj.wordpress.com/2021/05/27/hifive-unmatched/</a>) so I guess ask me anything ...
At £500+ it's not a realistic prospect I'm afraid. Maybe if there more affordable ones that becomes available then I definitely would want to take a look in-depth.
I find my enthusiasm for RISC-V materially reduced by its appalling lack of a base POPCOUNT instruction. Its lack makes my favorite optimizations annoyingly pessimal.<p>I understand that, <i>someday</i>, higher-end realizations will begin to ship with various "B" subsets implemented, but "portable" builds will tend to avoid relying on those for an appallingly long time after. (E.g. MSVC and Gcc still do not generate POPCNT instructions, on amd64, unless you specifically identify a post-2004 target.)<p>I will nonetheless be excited to learn of the first chip that does ship with the full raft of B instructions.