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HBPF – eBPF in Hardware

88 pointsby losfairabout 3 years ago

5 comments

AshamedCaptainabout 3 years ago
First we create a portable bytecode in order to run executable code in a hardware-independent way.<p>Then we create hardware to run that bytecode.<p>(No criticism intended to the author, I guess the goal is just to have fun).
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ncmncmabout 3 years ago
A NIC company Netronome has had something like this (i.e. running physically on the NIC) as a product for a couple of years now. They have a NIC with lots of proprietary cores that with eBPF can be made to run user code.<p>To be useful for capture it needed an extra feature, ability to grab a synchronized hardware time counter value, and deliver to a user-space buffer. Writing to user space memory, for kernel bypass, at least once was an underdeveloped eBPF feature; don&#x27;t know its current condition.
edude03about 3 years ago
This is super cool. Is the idea that you could use this as part of a NIC and get higher performance than running eBPF in the kernel?
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r0botabout 3 years ago
Hi are you the author? What would I need to study to be able to do stuff like this? Are there any specific books or courses you’d recommend? Thanks
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aseippabout 3 years ago
This is really cool. I wonder about whether or not putting the ISA itself directly in hardware is the right path forward, versus &quot;virtualizing&quot; it and compiling the bytecode again down to (yet another) architecture. It&#x27;s a much better fit for hardware than a lot of &quot;virtual&quot; ISAs, though. There are some reasons you might do this, but then again, reasons not to. Netronome uses this virtual approach instead of baking eBPF into their processors, from my cursory understanding. An advantage of that is agility; FPGAs are only so agile compared to a software compiler and on top of that new evolving features have impacts on things like clock frequency, testing, etc.<p>Beyond that there are also some big &quot;what ifs&quot; about eBPF; for example the fact it just uses the underlying Linux kernel memory model for concurrency. Maybe this is good. Maybe this is bad. I don&#x27;t know. But it has a big impact on the underlying design of the memory subsystem for any real design. Intuitively I want to say the concurrency abstractions in eBPF should have always been much, much higher level from the start for reasons like this (for example, maybe it would have just been easier to flat-out introduce the concept of transactions, if you&#x27;re already going to write a verifier to check every incoming program. This is much more difficult than what the verifier does today, but it&#x27;s also a very well explored one and makes the machine memory model irrelevant. It&#x27;s not the kind of stuff kernel developers do or think about, though...) But it&#x27;s not, so it&#x27;s still definitely something to think about. Do alternative vendors handle this already if they offload programs?<p>There is also the current state we&#x27;re in where &quot;what is a valid eBPF program&quot; mostly just comes down to &quot;whatever the Linux kernel says is a valid eBPF program&quot;, so you can probably get into situations where code emitted by Clang will work in one of the two, and not the another (note: you can <i>already</i> get into situations where Clang will emit code from valid input that the kernel then rejects, so this probably isn&#x27;t a very difficult example to construct.) This project already has some differences in ABI versus Linux, though, so...<p>Overall this is still a really cool project, though. You&#x27;d have to do something like this to answer all the above, and it bills itself as an experiment. You could still have a lot of fun with this even ignoring all that. And it doesn&#x27;t use Verilog. 10&#x2F;10.
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