This is inference only. AMD should invest into the full AI stack starting from training. For this they need a product comparable to NVIDIA 4090, so that entry level researchers could use their hardware. Honestly, I don't know why AMD aren't doing that already, they are best positioned to do that in the industry landscape.
AMD XDNA – Versal AI Core / 2nd-gen AIE-ML tiles<p>Are these programmable by the end-user? The "software programmability" section describes "Vitis AI" frameworks supported. But can we write our own software on these?<p>Is this card FPGA-based?<p>EDIT: [1] more info on the AI-engine tiles: scalar cores + "adaptable hardware (FPGA?)" + {AI+DSP}.<p>[1] <a href="https://www.xilinx.com/products/technology/ai-engine.html" rel="nofollow">https://www.xilinx.com/products/technology/ai-engine.html</a>
If this is based on fpga tech (xilinx) I don't think it will have a cost/benefit edge over asics. Why not do their own TPU like Google did? Nowadays even embedded MCUs come with AI accelerators (last I heard was 5TOPS in a banana pi-cm4 board - that is sufficient for object detection stuff and perhaps even more).
> High-Density Video Decoder**: 96 channels of 1920x1080p<p>> [...]<p>> **: @10 fps, H.264/H.265<p>Is 10 fps a standard measure for this kind of thing?
Sad to see amds ROCm efforts essentially abandoned. They were close to universal interop for cudnn and cuda on amd (and other!) Architectures.<p>Hopefully Intel takes a stab at it with their ARC line out now.
Douglas Adams said we'd have robots to watch TV for us. That seems to be the designed use case for this.<p>16gb RAM / 96 video channels ... I haven't done any of that work but it feels like they expect that "96" not to be fully used in practice.
I won't even take a look at the numbers unless they show a PyTorch model running on it, the problem is the big disconnect between HW and SW, realistically, have you ever seen any off-the shelf model running on something other than NVidia?