How a CPU works: Bare metal C on my RISC-V toy CPU

This gets brought up every time the topic shows up but <a href="https:&#x2F;&#x2F;www.nand2tetris.org" rel="nofollow">https:&#x2F;&#x2F;www.nand2tetris.org</a> is a course that abstracts how a computer works, and is worth checking out

I always wanted to understand how a CPU works, how it transitions from one instruction to the next and makes a computer work. So I thought: let&#x27;s implement one and run a C program on it.

Nice that you support multi-cycle memory instead of essentially using a big register file like <a href="https:&#x2F;&#x2F;nandgame.com&#x2F;" rel="nofollow">https:&#x2F;&#x2F;nandgame.com&#x2F;</a> uses.<p>I recently came across <a href="https:&#x2F;&#x2F;makerchip.com&#x2F;" rel="nofollow">https:&#x2F;&#x2F;makerchip.com&#x2F;</a>, and the TL-Verilog language it supports looks useful for when you want to make a pipelined design later.

You might find the QtRVSim simulator interesting:<p>- WASM version: <a href="https:&#x2F;&#x2F;comparch.edu.cvut.cz&#x2F;qtrvsim&#x2F;app&#x2F;" rel="nofollow">https:&#x2F;&#x2F;comparch.edu.cvut.cz&#x2F;qtrvsim&#x2F;app&#x2F;</a><p>- source &amp; native releases: <a href="https:&#x2F;&#x2F;github.com&#x2F;cvut&#x2F;qtrvsim">https:&#x2F;&#x2F;github.com&#x2F;cvut&#x2F;qtrvsim</a><p>It visualizes the inner workings of a basic RISC-V CPU, you can choose a basic single-cycle CPU, or a full 5-stage pipelined CPU with a hazard unit.<p>I also recently wrote a 5-stage RISC-V CPU in SystemVerilog, the implementation should be reasonably well-commented:<p><a href="https:&#x2F;&#x2F;github.com&#x2F;MatejKafka&#x2F;risc-v_pipelined_cpu">https:&#x2F;&#x2F;github.com&#x2F;MatejKafka&#x2F;risc-v_pipelined_cpu</a>

The article looks really interesting, can&#x27;t wait to dig in!<p>Side note: the articles on compilation also seem to be good and simple to understand, especially the one about code generation (which is a topic that other articles somehow always skip)

Nice article!<p>[I think there&#x27;s a minor typo in the Combinational Logic section - should it read &quot;(sometimes also called combinatorial logic)&quot;?]

This is a really fantastic read! I wonder if the author might consider including links to the git source for the entire project?

Lovely write-up, thank you for sharing your process!

I love computers

Wait we get 64bits risc-v on par with x86_64 on the desktop and arm64 on the mobile...<p>Oh, and what was done, it would be illegal with x86_64 and arm64 as you would have to pay a license in some countries... once you want to make money out of it.