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Show HN: RISC-V core written in 600 lines of C89

190 pointsby mnurziaalmost 2 years ago

13 comments

aportnoyalmost 2 years ago
How about a RISC-V disassembler in 200 lines of C99?<p><a href="https:&#x2F;&#x2F;github.com&#x2F;andportnoy&#x2F;riscv-disassembler&#x2F;blob&#x2F;master&#x2F;das.c">https:&#x2F;&#x2F;github.com&#x2F;andportnoy&#x2F;riscv-disassembler&#x2F;blob&#x2F;master...</a>
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bjournealmost 2 years ago
Why stick with c89? Can&#x27;t think of any compilers that doesn&#x27;t support c99 nowadays. The major benefit is that you can use uint8_t and friends directly and don&#x27;t need to define your own wrapper types.
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garganzolalmost 2 years ago
Seeing the RISC-V instructions implemented in the emulator like that, it comes to my mind that RISC-V is really a reduced instruction set CPU.<p>When compared to AVR 16-bit RISC instruction set, RISC-V looks so much simpler. (You may be indirectly familiar with AVR architecture by the household name &quot;Arduino&quot;.)<p>The intriguing part is that AVR is just a microcontroller, while RISC-V is intended to be a full-blown CPU.
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bitwizealmost 2 years ago
I feel myself descending into old-fartitude more and more with every year. My wife and I were recently involved in a car accident (no one was hurt). While I was being checked out I overheard a 20-year-old firefighter exchange Facebook information with an 18-year-old EMT. I was like, &quot;wait a minute, you guys seem really young and you still use Facebook? I thought Facebook was for your grandparents and all the kids now use Snapchat or TikTok?&quot;<p>I get that same feeling now. This kid is 20 and still using C89? Shouldn&#x27;t people his age have been reared entirely in the crystal-spires-and-togas utopia of Rust, with raw pointers and buffer overruns being mere legends of their people&#x27;s benighted past told to them by their elders?<p>It&#x27;s kind of comforting to see young programmers embracing the old ways, even if it&#x27;s for hack value only.
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nevi-mealmost 2 years ago
Question: do the implementation of single instructions compile to single instructions if targeting RISC-V with optimisations enabled? That would be really awesome if compilers realise what your code is doing and replace the implementations of instructions with those instructions.
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peterfireflyalmost 2 years ago
&#x27;switch&#x27; is a really, really nice language construct that was fully implemented long before C89. Using lots of nested &#x27;if&#x27;s instead is not a good idea.
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freecodyxalmost 2 years ago
This proves that at the core. The things we rely on to achieve great software and life impacting technologies are extremely simple. The complexity is that how to make them.
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charcircuitalmost 2 years ago
This isn&#x27;t a RISC-V core. It is a RISC-V emulator library.
sylwarealmost 2 years ago
A bigger implementation, but has 64bits support:<p><a href="https:&#x2F;&#x2F;bellard.org&#x2F;tinyemu&#x2F;" rel="nofollow">https:&#x2F;&#x2F;bellard.org&#x2F;tinyemu&#x2F;</a>
RobotToasteralmost 2 years ago
Is this designed to be used with some kind of C to VHDL&#x2F;verilog transpiler?
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userbinatoralmost 2 years ago
Besides not using a switch() for the main instruction decode, there&#x27;s nothing surprising here. Anyone who has worked with emulators before will find this code straightforward to read. RISC-V really is the new MIPS.
rowanG077almost 2 years ago
The Readme doesn&#x27;t answer it but I struggle to see why you want a c implementation of an ISA.
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sutterbutteralmost 2 years ago
As a total newb to programming, what am I looking at here?
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