Here is an interview with a former vice president of research at TSMC (and later SMIC).<p>I encourage you to read the interview in its entirety. It is illuminating.<p>On the question of of bringing up a new process node:<p>"We all take two years to develop one generation, how come you guys can do it in one or one-and-a-half year?" And they asked if some of your customer transfer technology to you or what not? And I told him, "No," I told him that, "That's not true." I think he probably implied we steal technology from customer, the way he talk.<p>And I say, "I'll tell you why." I said that, "When we develop one node, basically you have some learning cycles. First, you do some simulation. And you have some idea, then you run wafers to prove that. So, you run a group of wafers according to simulation and you have some splits. The wafer runs through the fab, they come out and you measure them, you analyze them, and you try to improve and you run this again. This again, you run. So, this is learning cycle." At that time, "It takes about six learning cycle, roughly, to complete one generation." Of course, you had some short loops and not just one. I said that, "My R&D wafer in the fab run much faster than yours, because my R&D engineer works three shifts and you only work one shift. So, your R&D wafer move eight hours a day, my work/move 24-hours a day. So, my wafers go three times faster, even if you are twice smarter than me, I still beat you up." <laughter><p><a href="https://www.computerhistory.org/collections/catalog/102792671" rel="nofollow noreferrer">https://www.computerhistory.org/collections/catalog/10279267...</a>