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ARMfuck: Turing completeness from two RISC instructions

4 pointsby rrampageover 1 year ago

1 comment

brucehoultover 1 year ago
Except those are not RISC instructions, they're the non-RISC instructions purists have been complaining about for almost 40 years in an otherwise RISC ISA. They're gone in ARMv8-A, as is the also arguably CISCy "PC is in a general register" property that this also heavily depends on.