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Zen 5's Leaked Slides

210 pointsby treesciencebotover 1 year ago

7 comments

pvgover 1 year ago
Discussion last week<p><a href="https:&#x2F;&#x2F;news.ycombinator.com&#x2F;item?id=37715082">https:&#x2F;&#x2F;news.ycombinator.com&#x2F;item?id=37715082</a>
dist-epochover 1 year ago
One big difference between CPUs and GPUs is memory bandwidth.<p>Dumb question, but why don&#x27;t Intel&#x2F;AMD massively increase memory bandwidth by adding more memory lanes? For example instead of the usual 4 slots on a desktop motherboard you would have 16 slots surrounding the CPU on all sides.<p>Is it that the CPU would be unable to effectively use all that bandwidth due to less parallelism compared with a GPU?
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snvzzover 1 year ago
&gt;(fusion) Conditional branching on x86 involves using an instruction that sets flags, and then a branch that jumps (or not) depending on flags.<p>x86 shows its age and accumulated cruft here.<p>RISC-V has test and jump in a single instruction, doing away with flags.
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phkahlerover 1 year ago
One thing I never see in pieces like this is comments on how a change might affect hyperthreading performance.<p>It&#x27;s not relevant for single threaded code, but then neither is doubling the core count from 4 to 8 or 16.
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Moldoteckover 1 year ago
Can I ask why more manufacturers don&#x27;t implement apple&#x27;s strategy with soc with ram and all and offer option to add additional classic ram as a slower cache buffer between soc&amp;ssd? This should both solve the lack of upgradability and unlock more performance per watt?
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ksecover 1 year ago
Zen 4, AMD Ryzen 5 7640U, 4.9Ghz, Single Core GB6 Score @ 2340.<p>Apple A17 Pro, 3.8Ghz, Single Core GB6 Score @ 2914<p>I dont think asking for an 20% increase in IPC is too much at this point.
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TheRealPomaxover 1 year ago
It&#x27;s not a leak unless the leaker proves its origin.