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Show HN: My hardware implementation of the DCPU-16 in Verilog RTL

4 pointsby sybreonabout 13 years ago
This is a pipelined hardware implementation of the DCPU-16 cpu designed by @notch for his new game 0x10c in Verilog RTL.<p>It is written entirely in RTL Verilog and is fully synthesisable. While basically functional, there is still plenty of room for improvement.<p>Took me a few days of hacking to get it out. I was only focused on functionality so there is plenty of room to reduce chip resource usage - primarily in the EA calculator.<p>I will still continue to work on it in the short term to iron out any kinks.

1 comment

lucian1900about 13 years ago
Very cool, a hardware cpu for a virtual one in a game yet to be released.<p>I think it's great some many people are interested, even I wrote a disassembler and an assembler.