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ASML and Samsung seal deal on 2nm chips

145 pointsby ycdxvjpover 1 year ago

15 comments

phkahlerover 1 year ago
Everything over the last years tells me we are very close to the end game in chip production.<p>1. power stopped scaling<p>2. clocks stopped - 4x over 20 years?<p>3. node names became fiction.<p>4. EUV now differentiates the top from everyone else.<p>5. IPC improvements are a trickle.<p>6. Tons of non-moores law ideas are here:<p>A) GPUs<p>B) chiplets<p>C) stacked die<p>D) specialized accelerators<p>7. Governments are now involved in dividing up the tech. Since its finally mature &#x2F; done.<p>It has been incredible to watch the progression over the last 50 years.
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jiggawattsover 1 year ago
Just to head off the inevitable comments about how 2nm isn&#x27;t really 2nm: yes, we know, it&#x27;s just a convention in the industry to indicate relative performance. It&#x27;s basically a marketing term, more than anything else.<p>The numbers VLSI engineers actually care about are things like millions of transistors per square millimeter (MTr&#x2F;mm^2), power per bit in picojoules (pJ), transistor rise times in nanoseconds, etc...<p>In those metrics, steady gains <i>have</i> been made, it&#x27;s just that the actual component sizes haven&#x27;t matched up to the gains recently. Instead, new types of technologies like &quot;gate-all-around&quot; have been used to eke out more performance instead of simply shrinking everything proportionally.
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HarHarVeryFunnyover 1 year ago
Just for size reference, the SARS-CoV-2 (covid) virus is 100nm in diameter.<p>A banana is 200,000,000nm, just in case you were wondering.
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kaycebasquesover 1 year ago
Just read this in <i>Chip War</i> (p. 333) by Chris Miller:<p>&gt; Gelsinger has cut a deal with ASML to let Intel acquire the first next-generation EUV machine, which is expected to be ready in 2025. If Intel can learn how to use these new tools before rivals, it could provide a technological edge.<p>Is the book talking about the same tech or different? If the same, does it mean that Intel only gets a year or two of headstart?
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borisskover 1 year ago
Surely ASML would prefer that Samsung and Intel could keep up with TSMC on manufacturing the latest and greatest CPU&#x2F;GPU&#x2F;SoCs. So not hard to believe that they&#x27;ll sell the first next gen machines to Samsung.
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PaywallBusterover 1 year ago
&gt; ASML is expected to supply 10 units of the High-NA EUV equipment to the market next year, and Intel has reportedly secured six of them<p>ouch
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qwoiejover 1 year ago
A few days ago it was reported that Chine companies started producing 5nm chips (model Kirin 9006C) - many years earlier than US government expected they will be able to do so. With this insane progress I will not wonder if Chinese companies start mass producing 2nm chips earlier than anyone else.
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nabla9over 1 year ago
Atomic radius (average distance from the center to the outermost isolated electron) of copper 135pm, silicon 0.11pm.<p>2nm is 7 copper atoms or 9 silicon atoms.
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huijzerover 1 year ago
Anyone here who knows what are the benefits of going from, say, 4 or 3nm to 2nm? ASML talks about energy cost per function mostly, but it’s not as clear cut as transitions in the 2000s were if I‘m not mistaken.
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nathan_phoenixover 1 year ago
How far does a $762 million deal get you? Doesn&#x27;t seem like such a huge sum for priority access to next gen 2nm machines, but also hard to judge as a layperson...
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yreadover 1 year ago
ASML also recently shipped high NA (0.55) EUV machine to Intel. This brings resolution from 13nm to 8nm
DeathArrowover 1 year ago
Samsung still has to solve yield and capacity problems. It wasn&#x27;t only process node advantage that made customers form lines in front of TSMC shop.
DeathArrowover 1 year ago
I wonder why Nvidia doesn&#x27;t establish it&#x27;s own fab business. It might be a good fit for them.
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sdflhasjdover 1 year ago
Is there a good comparison of how each fabs nanometer metric (aka version number) lines up?
gjm11over 1 year ago
Nigel Tufnel, chief scientist at TSMC, explains the merits of the latest hardware from ASML:<p>&quot;This is a fab, but it&#x27;s very special because if you can see, the numbers all go down to 2nm. Look, right across the board. 2nm, 2nm, 2nm, 2nm ...&quot;<p>&quot;And most of the fabs go down to 3.&quot;<p>&quot;Exactly.&quot;<p>&quot;Does that mean it&#x27;s ... smaller? Is it any smaller?&quot;<p>&quot;Well, it&#x27;s one smaller, isn&#x27;t it? It&#x27;s not 3. You see, most fabs are going to be running at 3. You&#x27;re on 3 on your fab -- where can you go from there? Where?&quot;<p>&quot;I dunno.&quot;<p>&quot;Nowhere, exactly. And what we do is, if we need that extra push over the cliff, you know what we do?&quot;<p>&quot;Put it down to 2.&quot;<p>&quot;2. Exactly. One smaller.&quot;
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