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Unexpected ways memory subsystem interacts with branch prediction

89 pointsby r4umover 1 year ago

8 comments

jazzyjacksonover 1 year ago
<a href="https:&#x2F;&#x2F;web.archive.org&#x2F;web&#x2F;20231228221536&#x2F;https:&#x2F;&#x2F;johnnysswlab.com&#x2F;unexpected-ways-memory-subsystem-interacts-with-branch-prediction&#x2F;" rel="nofollow">https:&#x2F;&#x2F;web.archive.org&#x2F;web&#x2F;20231228221536&#x2F;https:&#x2F;&#x2F;johnnyssw...</a>
t8srover 1 year ago
The irony of a blog about software performance going down after being on HN for 2 hours is too much. (I know, it’s just Wordpress, I’m just being a grump.)<p>The archive version seems to be missing the branchless versions of the algorithms - is that missing from the article itself as well? It’d be interesting to put the different versions into compiler explorer.
codebrrrover 1 year ago
I&#x27;m pretty sure the following optimization is invalid, since a is not a bool array, but one of positive&#x2F;negative numbers (see top of article):<p>&gt; You can use arithmetics to go branchless.<p><pre><code> if (a[i] &gt; 0) { cnt++; } </code></pre> &gt; Rewriting using arithmetic takes advantage of the fact that the expression a[i] &gt; 0 has an arithmetic value 1 if true and 0 if false. So the whole expression can be rewritten as:<p><pre><code> cnt += a[i]</code></pre>
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082349872349872over 1 year ago
Contrary to title, TFA got the results they should&#x27;ve already expected
sylwareover 1 year ago
I am currently coding x86_64 and I am trying to favor as much as reasonably possible &quot;non-predicted branch&quot;&#x2F;&quot;branchless&quot; code paths. Setcc and cmovcc instructions are really usefull, even though if I can think of real &quot;branchless&quot; algorithms, I will favor them.<p>x86_64 assembly for me is just the transition step before the actual RISC-V jump. This is &quot;register-ization&quot; of some code paths. Once done, it is kind of easy to do a port to another modern ISA. Bu then, I am thinking about all that branch prediction on RISC-V:<p>Will we have a way to hint a core&#x2F;hart to dodge prediction for some branches, fine-grained and &quot;cleanly&quot;? I was thinking about implicit branch prediction exclusion via some &quot;known&quot; instruction fusions, but the &#x27;implicit&#x27; here is scary.
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nayukiover 1 year ago
I explored the idea of making code branchless by replacing if&#x2F;else with bit masking arithmetic. I did this in the context of preventing timing attacks in cryptographic primitive algorithms. <a href="https:&#x2F;&#x2F;stackoverflow.com&#x2F;questions&#x2F;27865974&#x2F;is-masking-effective-for-thwarting-side-channel-attacks" rel="nofollow">https:&#x2F;&#x2F;stackoverflow.com&#x2F;questions&#x2F;27865974&#x2F;is-masking-effe...</a>
ceeamover 1 year ago
BTW, there&#x27;s no way, documented or not, to switch off branch predictor on a modern CPU, right?
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synergy20over 1 year ago
you can also use likely and unlikely to help the branch prediction.
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