The original PDP-11/Hack was an attempt at designing a minimal PDP-11 based on a discarded J-11. The J-11 is a microprocessor a bit similar to a 16-bit M68000 or a fast I8086.<p><a href="http://madrona.ca/e/pdp11hack/index.html" rel="nofollow">http://madrona.ca/e/pdp11hack/index.html</a><p>Since that time, many people have made variations on Brent Hilpert design. One of my sources of inspiration is:<p><a href="https://www.5volts.ch/pages/pdp11hack/" rel="nofollow">https://www.5volts.ch/pages/pdp11hack/</a><p>My design has the following features, but I never instantiated it:<p>* Much more RAM, 512KW<p>* The data bus is buffered (it is not in other designs)<p>* It has a GPIO (65C22) (because why not?)<p>* It can write into the upper byte<p>* The UART is the 6402, as in Brent Hilpert schematics, but the address is fully decoded to enable using a DEC OS.<p>* It has 5 switches to test/learn to single-step the memory accesses, the HALT, interrupts, or make a reset<p>* The boot configuration could be set up with micro-switches