Open Source Needs FPGAs; FPGAs Need an On-Ramp

I am currently waiting for my MATRIX Voice to arrive.<p><a href="https:&#x2F;&#x2F;www.indiegogo.com&#x2F;projects&#x2F;matrix-voice-open-source-voice-platform-for-all#&#x2F;" rel="nofollow">https:&#x2F;&#x2F;www.indiegogo.com&#x2F;projects&#x2F;matrix-voice-open-source-...</a><p>I have a Spartan 3AN dev board, another Spartan6 board, and an Arty. I was using Xilinx ISE free version to develop for the other boards until I bought the Arty. It came with a one year license for Vivado. I did not know that activating the Vivado license locked me in to developing only for Arty. ISE will no longer synthesize for any other target. I strongly dislike the closed nature of their software licensing.<p>I am retired but the last 10 years I worked writing VHDL. I can kind of read Verilog and understand what it does but do not know it well enough to write in it. The systems I worked on were for oil well logging. My circuits went down a 16,800 ft. hole where it was 350° F and the pressure was over 7000 PSI. Production quantities were typically less than 100. We used no bigger an FPGA than was needed to keep power at a minimum as there was no way to dissipate heat. Also the circuit boards were quite small since they needed to fit into a housing less than 2&quot; in diameter. Frequent design changes were needed but all ran on the same boards.<p>I am currently working on a processor design that I call NISC. The set of all opcodes is the null set. It&#x27;s a single instruction machine that does a move instruction with two operands, Source Address and Destination Address. I have considered putting the specifications and design on the internet as open source but am not sure where I should put it. Would anybody be interested in seeing it and where do you think I should put it?

Something that&#x27;s not really spoken to but is just as important is that FPGA development isn&#x27;t software development. You&#x27;re specifying hardware and usually that hardware doesn&#x27;t just scale to new platforms.<p>Time will tell if Open Source can make the transition over to that domain I&#x27;m cautiously optimistic but I think there&#x27;s a larger cultural divide there than called out.

Good place to start this would be here:<p><a href="https:&#x2F;&#x2F;github.com&#x2F;wkoszek&#x2F;freebsd_netfpga" rel="nofollow">https:&#x2F;&#x2F;github.com&#x2F;wkoszek&#x2F;freebsd_netfpga</a><p><a href="https:&#x2F;&#x2F;wiki.freebsd.org&#x2F;FPGA&#x2F;" rel="nofollow">https:&#x2F;&#x2F;wiki.freebsd.org&#x2F;FPGA&#x2F;</a><p><a href="https:&#x2F;&#x2F;www.freshports.org&#x2F;devel&#x2F;xc3sprog&#x2F;" rel="nofollow">https:&#x2F;&#x2F;www.freshports.org&#x2F;devel&#x2F;xc3sprog&#x2F;</a><p>It&#x27;s a FreeBSD NetFPGA driver for an older 1G card that I wrote during my internship 8 years ago, and a little ecosystem to make development more functional. I could program the FPGA from the FreeBSD and synthesize the code on FreeBSD that time.<p>What you say is very hard, though. Speeds which are achieved with modern ASICs are hard to compete with, because ASICs do a lot of advanced stuff with DMAs, interrupts, checksum offloading. This might be doable with an expensive hardware, but nobody in DYI community has money to do this.<p>Additionally the tools for synthesis are proprietary, and everything touching FPGA is pretty much proprietary too. Looking into date&#x2F;author of the synthesis is as far as I could get:<p><a href="https:&#x2F;&#x2F;github.com&#x2F;wkoszek&#x2F;libxbf" rel="nofollow">https:&#x2F;&#x2F;github.com&#x2F;wkoszek&#x2F;libxbf</a><p>(can only open file and tell you where the bitstream starts; not what it actually is) So the road to complete freedom goes through ASIC world, in my opinion.

Andrew Zonenberg has a whole list of open projects for FPGAs on his wiki:<p><a href="https:&#x2F;&#x2F;github.com&#x2F;azonenberg&#x2F;openfpga&#x2F;wiki" rel="nofollow">https:&#x2F;&#x2F;github.com&#x2F;azonenberg&#x2F;openfpga&#x2F;wiki</a><p>There has been a lot of exciting work in the same repo for Silego lines and general foundations for Open Source FPGA toolchains for many of the types out there.<p>I&#x27;ve been really enjoying Clifford&#x27;s Project IceStorm - open source tools which I&#x27;ve been using to develop&#x2F;test on real hardware build up some Verilog chops:<p><a href="http:&#x2F;&#x2F;www.clifford.at&#x2F;icestorm&#x2F;" rel="nofollow">http:&#x2F;&#x2F;www.clifford.at&#x2F;icestorm&#x2F;</a><p>I made a quickstart for it in a repo here for those interested in starting some Verilog adventures : )<p><a href="https:&#x2F;&#x2F;github.com&#x2F;gskielian&#x2F;TEAM-VERILOG" rel="nofollow">https:&#x2F;&#x2F;github.com&#x2F;gskielian&#x2F;TEAM-VERILOG</a>

For anyone interested in developping applications for FPGAs in a high-level DSL embedded in Scala, this project (<a href="https:&#x2F;&#x2F;github.com&#x2F;stanford-ppl&#x2F;spatial-lang" rel="nofollow">https:&#x2F;&#x2F;github.com&#x2F;stanford-ppl&#x2F;spatial-lang</a>) from a Stanford Lab might interest you.<p>Disclaimer: I am part of the lab.

I love FPGAs in a simplistic sort of way. I first started working with them when I was in school (1994-96) and thought I was going to spend my life with them. Other than some simulations with very expensive software that had been donated by Motorola I never actually used FPGAs. But from when I first started looking at them, I thought they would be the building blocks for an AI machine that could be added on to forever. I still think so, but I thought that there would be more visibility into the internal workings of the chips.

TimVideos is an open source project using FPGAs and Python for conference (and other) video capture: <a href="https:&#x2F;&#x2F;hdmi2usb.tv&#x2F;home&#x2F;" rel="nofollow">https:&#x2F;&#x2F;hdmi2usb.tv&#x2F;home&#x2F;</a><p>So if you&#x27;re interested in hardware, FPGAs or Python, it&#x27;s a great opportunity to get hacking! They are also part of GSoC this year, but it might be too late to apply.

I&#x27;m not exactly clear on what the post is advocating. If it&#x27;s saying that there should be an open source implementation of an FPGA, then I just have to say that I think there&#x27;s no way that&#x27;s happening anytime soon. There are way too many hurdles.<p>If the argument is just that the open source community should leverage FPGAs more as a means of creating more powerful &quot;open source&quot; hardware, and that there should be more resources for people to learn how to write hardware, then I guess I agree with that. But I don&#x27;t think FPGAs will be the panacea the author seems to think they will. FPGA implementations will always entail a performance and&#x2F;or efficiency hit compared to ASIC implementations, and I think many people won&#x27;t want to take that hit, limiting the number of users who are willing to adopt the open source solutions.

Having read through the comments, I&#x27;m surprised that no one is talking about the true benefit of a tech like fpga. It&#x27;s that it&#x27;s field programmable, with many that can be reprogrammed in fewer cycles than a cache miss. This means that ultimately, fpgas have the potential to be an optimization flag in your favorite compiler or jit.<p>I see this as an inevitable convergence, especially when rumor of fpga transistors&#x2F;mm^2 growing faster than cpu transistors&#x2F;mm^2. What I can&#x27;t tell is how much of what people talk about fpgas is hearsay, and how much is simply exaggerated. I know that every time I start to look into fpgas I always feel let down compared to their potential.

Since I didn&#x27;t see any other good place to post feedback, I thought I would point out that it&#x27;s &quot;sheer number&quot; not &quot;shear number.&quot;<p>Also, lowrisc.org is not accessible via HTTPS.

Personally, I&#x27;d rather have the ability to create a chip for $5K.<p>It&#x27;s too stupidly expensive for the CAD tools (&gt;$100K) when a wafer run is less than $20K for a very old process nowadays.

The trick is getting more EE&#x27;s to spend their grants on open-source FPGA&#x27;s and tooling:<p><a href="https:&#x2F;&#x2F;www2.eecs.berkeley.edu&#x2F;Pubs&#x2F;TechRpts&#x2F;2014&#x2F;EECS-2014-43.html" rel="nofollow">https:&#x2F;&#x2F;www2.eecs.berkeley.edu&#x2F;Pubs&#x2F;TechRpts&#x2F;2014&#x2F;EECS-2014-...</a><p><a href="http:&#x2F;&#x2F;opencircuitdesign.com&#x2F;qflow&#x2F;welcome.html" rel="nofollow">http:&#x2F;&#x2F;opencircuitdesign.com&#x2F;qflow&#x2F;welcome.html</a>

The author&#x27;s example about a huge multitude of ethernet drivers doesn&#x27;t really map well to the solution suggested (i.e. A big blank slate of FPGA logic with a bunch of ADC&#x2F;DAC&#x2F;codec fabric on the chip periphery). The wire side of Ethernet is really well specified, and tightly implemented. (Your chip won&#x27;t be 802.3 compliant if it&#x27;s not!) That&#x27;s a result of really good specs on the IEEE&#x27;s part. They put a TON of time into detailing how the Ethernet physical layer talks chip-to-chip. The driver side implementation for Ethernet, however, is basically the wild fucking West.<p>There are cases where the author&#x27;s approach makes sense - software defined radio jumps to mind. Adding one more layer of abstraction to ethernet drivers isn&#x27;t one if them. That seems like an area where software could learn from hardware - namely, that good specs drive good implementations.

Hi there,<p>we started a Kickstarter campaign a few days ago. We would really appreciate your expert feedback to our FPGA related board. Link: <a href="http:&#x2F;&#x2F;kck.st&#x2F;2orXGCv" rel="nofollow">http:&#x2F;&#x2F;kck.st&#x2F;2orXGCv</a><p>Our board connects a Raspberry Pi to the DE0 Nano. The FPGA can be programmed and reconfigured by the Raspberry Pi. The overall goal of our company is to make the entry to the FPGA world as easy as possible.<p>Motivation for our connector board: We try to avoid the proprietary tools as much as possible.<p>My experience with FPGAs so far (and only my opinions! please roast me)<p>CASE 1: Only FPGA, no processor: To complex for bigger projects, because of the missing high abstraction layer. Drawbacks: Slow development process; To make something useful you need a lot of stuff in your FPGA. Very boring for beginners and in my opinion also for experts;<p>CASE 2: FPGA with Soft-Core processor: For my bachelor thesis I once used the SCARTS Soft-Core processor from open cores in my DE0 Nano. Using an arbitrary Soft-Core processor from open cores can&#x27;t be done Out-of-the-Box. You have to be quite experienced working with FPGAs. For my thesis for example I had to write my own SDRAM controller and add an additional pipeline stage to the processor. Drawbacks: Soft-Core processor quite slow; To hardcore for beginners; Simulation time makes you consume a lot of coffee;<p>CASE 3: FPGA with processor on chip: Advantages: High speed interconnect between FPGA and processor; Fast processor; Disadvantages: Being fully dependent on the proprietary toolchains. In my opinion the &quot;FPGA only&quot;-tools suck, but the so-called &quot;system builders&#x2F;designers&quot; drove me crazy;<p>CASE 4: FPGA with external processor: In my opinion this is by far the best compromise. With some of my colleagues at the university I once made a bitcoin hashing cluster with our student boards. We also had an atmel microcontroller and a PC for that project. We just needed two days to make a fully working system. So FPGA programming can be very easy actually.<p>But if you combine the Raspberry Pi and the DE0 Nano it should be even easier.<p>With Raspberry Pi you have a clean and maintained Linux and with the DE0 Nano you have a powerful and still quite cheap FPGA board.<p>Again I would really appreciate any feedback. What do you do with FPGAs and how do you approach bigger FPGA projects?<p>Best regards, Joe

Well there are some things like <a href="http:&#x2F;&#x2F;papilio.cc&#x2F;" rel="nofollow">http:&#x2F;&#x2F;papilio.cc&#x2F;</a><p>I personally backed the papilio duo kickstarter. I haven&#x27;t done anything with the board yet but there has been some small stuff...and some pretty complex projects too.

Are there any fpga open hardware implementations available?

The course at that site is pretty interesting. There is an error that doesn&#x27;t affect any of the examples but might be a problem for future circuits: what are called OR are actually XOR. It took me a while to figure it out because the notation for &quot;don&#x27;t care&quot; was not obvious to me (it was explained later in the text after table circuits are introduced).<p>I was able to build a circuit to test this by copying an OR to the display block and hooking up the inputs to the buttons and the output to column 1. It might be interesting to have some scheme to test sub-blocks directly.

Aside from the acceleration angle, the maker community would also benefit from a richer ecosystem around FPGAs, especially inexpensive ones.<p>They are very handy for input and output of signals where you need precise timing.<p>Things like oscilloscopes, video cards for vintage displays, driving led billboard modules, and so on. All of which either aren&#x27;t possible, or aren&#x27;t optimal&#x2F;scalable on either Arduino or Rpi boards.<p>There are also bits like drop in clones of atmega microcontrollers that run on the fpga, so you can leverage some of what you already know to interface with it.

&gt; FPGA development has always been an industrial activity, dominated by brutalist, opaque, and proprietary tools.<p>Brutalist tools? As in, made out of raw concrete (béton brut)?

Question to all: is there a ycombinator for open source projects? Is it even possible to have one without profit as a motivator?

While tangential to the main point, it&#x27;s weird to read about the failure of the open source phone knowing about the Android Open Source Project. What&#x27;s missing from AOSP is Google Play Services aka proprietary web services.<p>Open source has been a huge hit on the client, it&#x27;s the firewalled server that has slowed the spread of free software.

The Open-Source community needs Open-Source HDL compilers. Until this happens OSS for FPGAs will continue to be slow.

Nice coincidental timing... I literally just ordered a Lattice Ice-40 eval board yesterday, and am hoping to get started using IceStorm to do some FPGA design stuff. It&#x27;s all brand new to me, so any good entry level stuff, tutorials, docs, etc. on any of this stuff are very much appreciated.

I am trying to teach myseful CUPL on Atmel 16v8&#x27;s as a cheap, super basic way to get my feet wet in the FPGA&#x2F; CPLD&#x2F; GAL world. I have a breadboard half wired up to blink lights based on input, etc. I like older technology, but hope that what I learn applies to more modern FPGAs.

Unrelated to the article content, but the webpage zoom is broken on mobile.

Do FPGAs have a future beyond &quot;prototyping non-memory intensive algorithms for eventual ASIC implementation&quot;?<p>It seems to me that the scale out + scale up method of x86 and GPUs are the most promising and profitable arenas still, besides some very niche and very particular applications?<p>I could and would like to be wrong. I&#x27;d go learn FPGA dev then if there were things that needed accelerating and were personally lucrative to me :)

FPGA hardware is vendor locked and incredibly proprietary. The current business model sells chips at cost or below and makes it up with software licensing.<p>This is a huge problem for open source adoption, and unless manufacturers change the business model we will never see widespread use of FPGA&#x27;s.