Program FPGAs with Go

This being the internet, let me preface this with this being honest questions, rather than attacks. I did try to read through the docs before asking but I don&#x27;t see the answers directly.<p>Especially on the FPGA side, how does this interact with all the features of Go that seem ill-suited to an FPGA implementation? Can I write functions that generate and consume closures? Where is my garbage going on the FPGA side and how is it collected? Or is the FPGA code being written only in a subset of Go?<p>I understand the idea of wrapping the primitives offered by the FPGA hardware itself into channels, but I&#x27;m unclear on how one can sensibly implement a Go runtime on top of that in the FPGA without making it too difficult to understand the cost model of your Go code.

Congrats!<p>We, a stanford lab, are pursuing similar goals but opensource and from a Scala DSL although our doc (<a href="http:&#x2F;&#x2F;spatial-lang.readthedocs.io&#x2F;en&#x2F;latest&#x2F;tutorial&#x2F;starting.html" rel="nofollow">http:&#x2F;&#x2F;spatial-lang.readthedocs.io&#x2F;en&#x2F;latest&#x2F;tutorial&#x2F;starti...</a>) is not that up-to-date:<p><a href="https:&#x2F;&#x2F;github.com&#x2F;stanford-ppl&#x2F;spatial-lang" rel="nofollow">https:&#x2F;&#x2F;github.com&#x2F;stanford-ppl&#x2F;spatial-lang</a>

Interesting. This is a neat approach to building a register-transfer language using some high-level bindings. Go (at a very high level) seems to have a pretty good match with the async nature of transistor-level bit-flow operations when you use channels. In theory you could map this to any language with strongly-typed async operations.<p>You get advantages of Go&#x27;s type-checker, though you&#x27;re probably limited to a <i>very</i> small subset of the language. Note that you won&#x27;t be able to use a lot of third-party languages unless their translation is <i>really</i> good or the third-party package code is <i>very</i> simple.<p>Docs seem to be available here (thanks to another comment in this thread): <a href="http:&#x2F;&#x2F;docs.reconfigure.io&#x2F;welcome.html" rel="nofollow">http:&#x2F;&#x2F;docs.reconfigure.io&#x2F;welcome.html</a><p>I think the approach of mapping a high-level language to a CPU is not necessarily novel, but using Go for it is.<p>I used a different approach to build a bit-flow graph in Java for a project in the past. Rather than map the whole language to the circuit, I created some APIs that would generate the graph and export it. It looks fairly similar to what you see here.

The website in itself does not give me an understanding of whatever the hell they&#x27;re doing. I&#x27;m a computer engineering undergrad and I&#x27;ve done FPGA&#x27;s before. I don&#x27;t see what&#x27;s &quot;code in go and deploy FPGA&#x27;s to the cloud&quot;. I think that putting some code and other actual use cases to the website would be nice.<p>Looking at some of the examples it seems to me that you&#x27;d still need to know hardware programming, memory etc. Now my comment seems very snarky, but I still think that it&#x27;s a huge achievement to have gotten this far with this and I wish them luck! I just don&#x27;t get the target user base.

docs: <a href="http:&#x2F;&#x2F;docs.reconfigure.io&#x2F;" rel="nofollow">http:&#x2F;&#x2F;docs.reconfigure.io&#x2F;</a><p>github: <a href="https:&#x2F;&#x2F;github.com&#x2F;ReconfigureIO" rel="nofollow">https:&#x2F;&#x2F;github.com&#x2F;ReconfigureIO</a>

This is great, I&#x27;ve waited 20 years for this (computer engineering degree 1999). For all the naysayers - what has gone wrong with computing, why Moore&#x27;s law no longer works, etc etc is that we&#x27;ve gone from general purpose computing to proprietary narrow-use computing thanks to Nvidia and others. VHDL and Verilog are basically assembly language and are not good paradigms for multicore programming.<p>The best languages to take advantage of chips that aren&#x27;t compute-limited* are things like Erlang, Elixir, Go, MATLAB, R, Julia, Haskell, Scala, Clojure.. I could go on. Most of those are the assembly languages of functional programming and are also not really usable by humans for multicore programming.<p>I personally vote no confidence on any of this taking off until we have a Javascript-like language for concurrent programming. Go is the closest thing to that now, although Elixir or Clojure are better suited for maximum scalability because they are pure functional languages. I would give MATLAB a close second because it makes dealing with embarrassingly parallel problems embarrassingly easy. Most of the top rated articles on HN lately for AI are embarrassingly parallel or embarrassingly easy when you aren&#x27;t compute-limited. We just aren&#x27;t used to thinking in those terms.<p>* For now lets call compute-limited any chip that can&#x27;t give you 1000 cores per $100

Let me be a bit pessimistic amd ignorant here.<p>People who want to use an FPGA should learn VHDL or verilog. There have been a lot of projects to make C compile to VHDL&#x2F;verilog, and it&#x27;s generally accepted that it does not work very well.<p>What is the advantage of using Go for the same purpose?

Some great questions (and some other really exciting projects m!)<p>It&#x27;s early days for us at reconfigure.io, we&#x27;re just working with a few core early users at the moment and we&#x27;ll be bringing more examples, benchmarks and increased access over time.

Are they using soft-cores on a fpga or actually synthesizing a design specific to one&#x27;s go code? Am I blind or is is the website not very clear?

This isn&#x27;t quite the same thing, but it kind of reminds me of Altera&#x27;s Nios soft processor: <a href="https:&#x2F;&#x2F;www.altera.com&#x2F;products&#x2F;processors&#x2F;overview.html" rel="nofollow">https:&#x2F;&#x2F;www.altera.com&#x2F;products&#x2F;processors&#x2F;overview.html</a><p>In one of my previous lives doing embedded development, we were able able to program the FPGA using pretty plain looking C on the Nios, which just dedicated a portion of the FPGA&#x27;s gates to running a simple, ARM-like processor.<p>It was cool for us software dudes because we could just do general-purpose computing (mostly) on the FPGA, and the verilog folks would wire it up for us to work right. It&#x27;s not the cheapest way to design a product, but the stuff I worked on had crazy high profit margins, so it was a fair trade-off for better productivity.

FPGAs are worth studying in case anyone doesn&#x27;t really know them. I once had an interview question right out of uni, and it was about FPGAs and I didn&#x27;t know what they were. The interviewer really looked down his nose at me after I told him that.

This looks awwwwfully nonfree...

<p><pre><code> &gt;&gt; expensive, hard-to-source hardware engineering skills. </code></pre> If only that were true.<p>Lots of hardware engineers have moved into software.

This is cool but where are the metrics, examples?

Someone needs a tool chain with chisel as the target.

This post is peak 2017 Hacker News