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Show HN: detecting cache latency inside a Web browser

107 点作者 Marat_Dukhan超过 7 年前

12 条评论

Marat_Dukhan超过 7 年前
Author here. I made this demo and a related matrix-matrix multiplication demo [1] back in 2015 for Robert van de Geijn&#x27;s Linear Algebra: Foundations to Frontiers MOOC class [2]. In the light of Spectre attack and recent browsers&#x27; changes to reduce precision of timers, I remembered of this project, and decided to check if it still works now, 3 years later. Surprisingly, it still works well!<p>The source code is available on GitHub [3].<p>[1] <a href="https:&#x2F;&#x2F;maratyszcza.github.io&#x2F;laff-demos&#x2F;dgemm.html" rel="nofollow">https:&#x2F;&#x2F;maratyszcza.github.io&#x2F;laff-demos&#x2F;dgemm.html</a><p>[2] <a href="https:&#x2F;&#x2F;www.edx.org&#x2F;course&#x2F;linear-algebra-foundations-frontiers-utaustinx-ut-5-02x" rel="nofollow">https:&#x2F;&#x2F;www.edx.org&#x2F;course&#x2F;linear-algebra-foundations-fronti...</a><p>[3] <a href="https:&#x2F;&#x2F;github.com&#x2F;Maratyszcza&#x2F;laff-demos" rel="nofollow">https:&#x2F;&#x2F;github.com&#x2F;Maratyszcza&#x2F;laff-demos</a>
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kaoD超过 7 年前
On my pretty outdated Core 2 Duo Q9300: <a href="https:&#x2F;&#x2F;i.imgur.com&#x2F;HQXm5FU.png" rel="nofollow">https:&#x2F;&#x2F;i.imgur.com&#x2F;HQXm5FU.png</a><p>The CPU is advertised as 6 MB L2 cache[0] but it has &quot;L1 = 4 x 32 KB 8-way set associative data caches and L2 = 2 x 3 MB 12-way set associative caches (each L2 cache is shared between 2 cores)&quot;[1].<p>You can clearly see the constant time access to L1 cache up to 32KB. Then grows to (linear?) access time up to 2MB (where it still fits in one of the L2 caches) and then again a different (log-like?) function from there on.<p>This is really neat.<p>[0] <a href="https:&#x2F;&#x2F;ark.intel.com&#x2F;products&#x2F;33922&#x2F;Intel-Core2-Quad-Processor-Q9300-6M-Cache-2_50-GHz-1333-MHz-FSB" rel="nofollow">https:&#x2F;&#x2F;ark.intel.com&#x2F;products&#x2F;33922&#x2F;Intel-Core2-Quad-Proces...</a><p>[1] <a href="http:&#x2F;&#x2F;www.cpu-world.com&#x2F;CPUs&#x2F;Core_2&#x2F;Intel-Core%202%20Quad%20Q9300%20EU80580PJ0606M%20(BX80580Q9300).html" rel="nofollow">http:&#x2F;&#x2F;www.cpu-world.com&#x2F;CPUs&#x2F;Core_2&#x2F;Intel-Core%202%20Quad%2...</a>
esnard超过 7 年前
Somewhat related: using the cache latency to estimate the CPU cache size. <a href="https:&#x2F;&#x2F;fromwhenceitca.me&#x2F;cache_size&#x2F;cache_size.html" rel="nofollow">https:&#x2F;&#x2F;fromwhenceitca.me&#x2F;cache_size&#x2F;cache_size.html</a>
jacquesm超过 7 年前
So, who thought it was a great idea again to use a mechanism intended for document transfer to run unsigned, unaudited code on just about every client in the world?
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Sephr超过 7 年前
This is similar to how I detected total CPU cores in 2013 to implement navigator.hardwareConcurrency: <a href="https:&#x2F;&#x2F;eligrey.com&#x2F;blog&#x2F;cpu-core-estimation-with-javascript&#x2F;" rel="nofollow">https:&#x2F;&#x2F;eligrey.com&#x2F;blog&#x2F;cpu-core-estimation-with-javascript...</a>
laCour超过 7 年前
i5-4690K (L1 4x32KB; L2 4x256KB; L3 6MB): <a href="https:&#x2F;&#x2F;i.imgur.com&#x2F;FUs1isW.png" rel="nofollow">https:&#x2F;&#x2F;i.imgur.com&#x2F;FUs1isW.png</a><p>LG v30 (L2 2MB): <a href="https:&#x2F;&#x2F;i.imgur.com&#x2F;q5R3bLY.png" rel="nofollow">https:&#x2F;&#x2F;i.imgur.com&#x2F;q5R3bLY.png</a>
polyfemos超过 7 年前
And with the latest iOS 11.2.2, this (admittedly cool) piece of code no longer works.<p>Still works on the latest MacOS (10.13.2) though.
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mherrmann超过 7 年前
On my OnePlus X Android phone: <a href="https:&#x2F;&#x2F;imgur.com&#x2F;a&#x2F;C1hb7" rel="nofollow">https:&#x2F;&#x2F;imgur.com&#x2F;a&#x2F;C1hb7</a>
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Yetanfou超过 7 年前
Thinkpad T42p with Pentium M 1.8GHz, 2MB L2 cache<p><a href="https:&#x2F;&#x2F;imgur.com&#x2F;agxy8e7" rel="nofollow">https:&#x2F;&#x2F;imgur.com&#x2F;agxy8e7</a>
Mister_Snuggles超过 7 年前
I&#x27;d like to see some text explaining what I&#x27;m looking at.<p>Based on the title, it&#x27;s something to do with cache latency, but that doesn&#x27;t really help me. What exactly is it measuring? How does it perform this measurement? What are the limitations of this technique? What are the wider implications of this? What uses does it have, both potentially nefarious ones and potentially beneficial ones?
yeukhon超过 7 年前
Is there plan to collect this data voluntarily? Would be interesting to see the different percentiles
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chrisper超过 7 年前
Is that Ram only or also L1 etc. caches?
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