Verilator: Fast, Free Verilog HDL Simulator

Verilator is an awesome tool. I suggest if you are interested in open-source EDA this you also check out Icarus Verilog [1] - an event based Verilog sim, Yosys [2] - a Verilog synthesis tool and formal solver, and NextPNR [3] - a place-and-route tool. The set of these provide a pretty reasonable set of tools for developing hardware (that is HDL) with fully open source software!<p>[1] - <a href="http:&#x2F;&#x2F;iverilog.icarus.com&#x2F;" rel="nofollow">http:&#x2F;&#x2F;iverilog.icarus.com&#x2F;</a> [2] - <a href="http:&#x2F;&#x2F;www.clifford.at&#x2F;yosys&#x2F;" rel="nofollow">http:&#x2F;&#x2F;www.clifford.at&#x2F;yosys&#x2F;</a> [3] - <a href="https:&#x2F;&#x2F;github.com&#x2F;YosysHQ&#x2F;nextpnr" rel="nofollow">https:&#x2F;&#x2F;github.com&#x2F;YosysHQ&#x2F;nextpnr</a>

Verilator has some serious limitations:<p><pre><code> The driving test bench is C&#x2F;C++ It is a cycle simulator, not a delta-time simulator: it will only simulate synthesizable code (not test bench code) It cannot do back-annotated timing simulations It cannot use encrypted vendor libraries (no simulations with Xilinx IP, for example) It has no mixed-HDL language capabilities It requires Gtkwave to view waveforms with (opinion, but I hate the UI) </code></pre> It is a terrible recommendation for beginners - you&#x27;d be much better served by using Xilinx Vivado&#x27;s inbuilt simulator and waveform viewer.

During my short experience with hardware design at the university I never had the chance of using Verilog. Are there advantages in using it instead of VHDL?

One cool thing you can do with Verilator is use the API to simulate other hardware. For example, here&#x27;s a Verilog Gameboy being simulated realtime by simulating the display attached to it: <a href="https:&#x2F;&#x2F;twitter.com&#x2F;zephray_wenting&#x2F;status&#x2F;1112691732393664512" rel="nofollow">https:&#x2F;&#x2F;twitter.com&#x2F;zephray_wenting&#x2F;status&#x2F;11126917323936645...</a>

The verilator team also wrote the verilog mode for emacs. Very well done.

I met the author at a conference about 6 months ago. Very nice guy. Verilator is a really good way to test your designs if your building something non trivial.

Does anyone have links to free analog design tools?

And how does one get a cheap FPGA board out of it? China? Any recommendations?