[edit] They did mention the error/bad core handling briefly, as Druidsbane correctly points out [/edit]<p>Obviously not much specific detail at this stage, but it strikes me as odd that there's no points from Cerebras that seem to address the obvious concern with fabrication errors - I'd always understood that by having many small chips that mitigated costs, because one single chip could be toast but you'd still have a substantial number of unaffected ones to use.<p>Unless they've got some special solution up their sleeves, it seems like one error would knock out the whole chip.<p>Also, by needing it to be square, won't they fail to utilise the sections between the edge of the square and the edge of the wafer's circular edge?