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Compiling my own SPARC CPU inside a cheap FPGA

266 点作者 ttsiodras超过 5 年前

13 条评论

tverbeure超过 5 年前
For those interested in hacking in this:<p>The Pano G2 FPGA is a monster, but prices on eBay have gone up a lot. My cheapest buy was 25 of them for $85 (including shipping!). They now go for around 1 for $30 if you’re lucky... or $200+ for many.<p>The Pano G1 (with VGA instead of DVI) is cheaper but has a much smaller FPGA, though still large by hobby standards.<p>The benefit of the G1 is that all interfaces are working now, including DRAM, USB, Ethernet.<p>Last week, Skip Hansen got a full CP&#x2F;M system running on one: <a href="https:&#x2F;&#x2F;github.com&#x2F;skiphansen&#x2F;pano_z80" rel="nofollow">https:&#x2F;&#x2F;github.com&#x2F;skiphansen&#x2F;pano_z80</a><p>USB on the G2 is hard. A bunch of people have tried and failed.
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johndoe0815超过 5 年前
For a complete SPARCstation 5 implementation able to run SunOS, Solaris, BSD, Linux or NeXTstep, see <a href="http:&#x2F;&#x2F;temlib.org&#x2F;" rel="nofollow">http:&#x2F;&#x2F;temlib.org&#x2F;</a> - this fits on a Spartan6 XC6SLX45T FPGA, so you should be able to get it to work on the larger Spartan 6 FPGAs (if you can manage to build a working memory controller...).<p>It seems that the Panos are only available on eBay US, any idea where to get them in Europe without all the shipping and tax hassle?
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alain94040超过 5 年前
Great article, I hope it helps motivate more people to give hardware design a try.<p><i>the truth is that most of the HW designers I know are editing inside their Vendor-provided IDEs.</i><p>Maybe true for FPGA designers, but not for ASIC designers in my experience.<p><i>Another crazy difference I experienced was that builds are NOT deterministic</i><p>Yes, hardware generation (synthesis, but mostly optimizations, placement and routing) are not deterministic. SW people are starting to experience that phenomenon with ML as well: you don&#x27;t fully control what you get, but it works.
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ur-whale超过 5 年前
This article is the perfect summary of everything that&#x27;s wrong with the existing HW development toolchains for FPGAs.<p>The best bit is the windows-only version of the Xillinx gooware that in fact installs a Linux virtual box on windows to finally get to run the tools it needs.<p>Oh, and yeah : there&#x27;s a lame protection in there that checks it&#x27;s running on a specific virtual box with a specific MAC address.<p>Amazing (not in a good way).
LeonM超过 5 年前
&gt; Alas, I am told by my friends that DDR controllers are no joke; they are not the playground of bored SW engineers.<p>No, they definitely aren&#x27;t funny. I&#x27;ve worked with FPGAs and DDR controllers at college and their can be a big PITA. Even with DDR controller libraries you can still run into all sorts of timing issues.
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peter_d_sherman超过 5 年前
This article brings up an interesting question...<p>What other cheap hardware products contain FPGA&#x27;s that are potentially user accessible?<p>I started a new message chain for this:<p>Ask HN: What other cheap hardware products contain FPGA&#x27;s?<p><a href="https:&#x2F;&#x2F;news.ycombinator.com&#x2F;edit?id=21305355" rel="nofollow">https:&#x2F;&#x2F;news.ycombinator.com&#x2F;edit?id=21305355</a>
qubex超过 5 年前
On a side-note of pedantry, we really need to stop using the term ‘<i>compiling</i>’ in the context of FPGAs and HDLs. To ‘compile’ is to assemble a dossier of documents and&#x2F;or fill in forms - this is why Grace Hopper called her automatic code generation contraption a ‘compiler’: because, quite appropriately, it took the description of actions to be undertaken by the machine and fleshed them out in a ritualistic fashion in lower-level instructions.<p>HDLs and FPGAs have very different principles and objectives. The best term is ‘<i>instantiate</i>’, because one creates an instance of a given hardware description upon the substrate of gates provided by the array.<p>I’m sure I’ll be told I’m nit-picking, but those who do so would probably recoil in horror at the <i>faux pas</i> of some n00b saying a browser “compiles HTML” and tell them the correct term is ‘<i>render</i>’, and they’d be right.<p>Please, let’s be careful and deliberate about the terms we use, can we please?
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rjsw超过 5 年前
Another design to target at one of these boxes could be Milkymist [1], uses the lm32 CPU and various peripheral cores.<p>[1] <a href="https:&#x2F;&#x2F;github.com&#x2F;m-labs&#x2F;milkymist" rel="nofollow">https:&#x2F;&#x2F;github.com&#x2F;m-labs&#x2F;milkymist</a>
Annatar超过 5 年前
This is awesome!!! (Ultra)SPARC CPU&#x27;s are a joy to code for in assembler, and modern T3, T4 and T5&#x27;s are number crunching monsters.<p>How about synthesizing the GPL-licensed OpenSPARC T2 now?<p><a href="https:&#x2F;&#x2F;www.oracle.com&#x2F;technetwork&#x2F;systems&#x2F;opensparc&#x2F;opensparc-t2-page-1446157.html#t2-to-use" rel="nofollow">https:&#x2F;&#x2F;www.oracle.com&#x2F;technetwork&#x2F;systems&#x2F;opensparc&#x2F;openspa...</a><p>I&#x27;d love to have SmartOS backported on a FPGA-based, OpenSPARC T2, 19&quot; 1U rack mountable server someday. Free hardware and software all the way.
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tpmx超过 5 年前
Hmm, yeah, that does look affordable. Lots of ads on ebay.<p>&quot;Lot of 25 Pano Logic Thin &#x2F; Zero Desktop Client Black w&#x2F; Power Supply<p>Buy now: US $170.00&quot;<p>I wonder what the thinking was that lead Pano Logic to put expensive FPGAs inside these units, instead of some more typical cheap ARM SoC?<p>Edit: Ah, they operated in 2006-2012. I guess that was just before the rise of the very cheap&#x2F;fast SoCs.
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jhallenworld超过 5 年前
Well, for comparison, the cost of a current 100K LUT FPGA on a board is:<p>$250 for Xilinx Artix-7:<p><a href="https:&#x2F;&#x2F;store.digilentinc.com&#x2F;arty-a7-artix-7-fpga-development-board-for-makers-and-hobbyists&#x2F;" rel="nofollow">https:&#x2F;&#x2F;store.digilentinc.com&#x2F;arty-a7-artix-7-fpga-developme...</a><p>$100 for Lattice ECP5 (85K LUT):<p><a href="https:&#x2F;&#x2F;www.latticestore.com&#x2F;products&#x2F;tabid&#x2F;417&#x2F;categoryid&#x2F;59&#x2F;productid&#x2F;122774&#x2F;default.aspx" rel="nofollow">https:&#x2F;&#x2F;www.latticestore.com&#x2F;products&#x2F;tabid&#x2F;417&#x2F;categoryid&#x2F;5...</a>
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panpanna超过 5 年前
This use of expensive surplus hw reminds me of the nsa@home project<p><a href="http:&#x2F;&#x2F;nsa.unaligned.org&#x2F;" rel="nofollow">http:&#x2F;&#x2F;nsa.unaligned.org&#x2F;</a>
roryrjb超过 5 年前
In one of the bash scripts in this article there&#x27;s a lot of &quot; || exit 1&quot;, you can enable this automatically by using &quot;set -e&quot; at the beginning of the script, this works for POSIX shell too. You can get extra safety in bash specifically by doing something like &quot;set -euo pipefail&quot; that will exit on errors, including pipeline failures and also on undefined variables.
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