For anyone curious: this instruction set is proposed by Anger Fog. Here's its Highlight section:<p>> ∙ The ForwardCom instruction set is neither RISC nor CISC, but a new paradigm with the advan-
tages of both. ForwardCom has few instructions, but many variants of each instruction. A con-
sistent template system with few instruction sizes combines the fast and streamlined decoding
and pipeline design of RISC systems with the compactness and more work-done-per-instruction
of CISC systems.<p>> ∙ The ForwardCom design is scalable to support small embedded systems as well as large super-
computers and vector processors without losing binary compatibility.<p>> ∙ Vector registers of variable length are provided for efficient handling of large data sets.<p>> ∙ Array loops are implemented in a new flexible way that automatically uses the maximum vector
length supported by the microprocessor in all but the last iteration of a loop. The last iteration
automatically uses a vector length that fits the remaining number of elements. No extra code
is needed to deal with remaining data and special cases. There is no need to compile the code
separately for different microprocessors with different vector lengths.<p>> ∙ No recompilation or update of software is needed when a new microprocessor with a different
vector register length becomes available. The software is guaranteed to be forward compatible
and take advantage of the longer vectors of new microprocessor models.<p>> ∙ Strong security features are a fundamental part of the hardware and software design.<p>> ∙ Memory management is simpler and more efficient than in traditional systems. Various tech-
niques are used for avoiding memory fragmentation. There is no memory paging and no transla-
tion lookaside buffer (TLB). Instead, there is a memory map with a limited number of sections
with variable size.<p>> ∙ There are no dynamic link libraries (DLLs) or shared objects. Instead, there is only one type of
function libraries that can be used for both static and dynamic linking. Only the part of the li-
brary that is actually used is loaded and linked. The library code is kept contiguous with the
main program code to improve caching and reduce memory fragmentation. Executable files can
be re-linked to replace or update library functions and plug-ins and to support multiple user in-
terface frameworks.<p>> ∙ A mechanism for calculating the required stack size is provided. This can prevent stack overflow
in most cases without making the stack bigger than necessary.<p>> ∙ A mechanism for optimal register allocation across program modules and function libraries is
provided. This makes it possible to keep most variables in registers without spilling to memory.
Vector registers can be saved in an efficient way that stores only the part of the register that is
actually used.