TE
科技回声
首页24小时热榜最新最佳问答展示工作
GitHubTwitter
首页

科技回声

基于 Next.js 构建的科技新闻平台,提供全球科技新闻和讨论内容。

GitHubTwitter

首页

首页最新最佳问答展示工作

资源链接

HackerNews API原版 HackerNewsNext.js

© 2025 科技回声. 版权所有。

Transistor Options Beyond 3nm (2018)

76 点作者 cracker_jacks超过 4 年前

3 条评论

danbruc超过 4 年前
Are there any [serious] attempts to go three dimensional? And I do not mean stacking a couple of dies, I mean building inside a volume with dimensions and densities in all three dimensions comparable to what we are currently doing in two dimensions.<p>If one naively considers going from transistors of area a² on dies of area b² to transistors of volume a³ in a three dimensional die of volume b³, one finds that we could have quadrillions of transistors in a cube with side lengths of tens of millimetres using currently available transistor sizes. It would of course instantly melt itself due to the different scaling behaviors of different quantities.<p>But we can reduce transistor area only so much until we end up at the size of molecular or single atom transistors, we are currently probably on the order of hundred atoms side length.
评论 #24638012 未加载
评论 #24637378 未加载
评论 #24639900 未加载
评论 #24637728 未加载
评论 #24659825 未加载
评论 #24643453 未加载
评论 #24638980 未加载
评论 #24641068 未加载
评论 #24637751 未加载
评论 #24639115 未加载
评论 #24650953 未加载
Sohcahtoa82超过 4 年前
I&#x27;m going off topic a bit here, but it&#x27;s something I&#x27;ve thought of before...<p>We&#x27;re at the point where single-core performance gains on each generation are weak, and instead are now heading for massive parallelization. Is the the speed of light (more specifically, the speed of current) actually the limiting factor here?<p>At 5 Ghz, in the time it takes for the clock to tick once, light travels 6 cm (2.36 inches). I know electrical current moves even slower than that (and varies depending on the material), so is it possible that it could impact theoretical maximum performance per core, at least limiting clock speeds, due to signals going across the CPU and across components being out of sync?
评论 #24642325 未加载
评论 #24643336 未加载
ansible超过 4 年前
&gt; <i>At each node, process cost and complexity are skyrocketing, so now the cadence for a fully scaled node has extended from 18 months to 2.5 years or longer. In addition, fewer foundry customers can afford to move to advanced nodes.</i><p>So of course let&#x27;s not even mention any technology beyond silicon photolithography.<p>They mention a 1.5nm process node, which is 7.5 silicon atoms wide. So: A) why aren&#x27;t we talking about 1.4 or 1.6 nm instead? And B) at what point will the industry acknowledge the need for atomically precise manufacturing?
评论 #24637553 未加载
评论 #24637695 未加载
评论 #24637489 未加载