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ARM and Lock-Free Programming

229 点作者 markdog12超过 4 年前

17 条评论

runeks超过 4 年前
I appreciate learning more about what, exactly, ARM&#x27;s &quot;weaker memory model&quot; constitutes. It&#x27;s clearer to me after reading this article.<p>I wonder how much the gain in performance of e.g. Apple&#x27;s M1 chip, compared to an x86 CPU, can be attributed to this weaker constraint. Given that the M1 can outperform an x86 CPU even when emulating x86 code, perhaps it&#x27;s not much.<p>Also, I suspect programming languages that are immutable by default will gain a larger advantage using ARM&#x27;s weaker memory model, as the compiler can more often safely let the CPU perform reordering (due to not having to wait for a mutable variable being updated until it can execute a subsequent line of code which depends on this updated variable).
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dataflow超过 4 年前
If you want to dig deeper, watch these videos: <a href="https:&#x2F;&#x2F;herbsutter.com&#x2F;2013&#x2F;02&#x2F;11&#x2F;atomic-weapons-the-c-memory-model-and-modern-hardware&#x2F;" rel="nofollow">https:&#x2F;&#x2F;herbsutter.com&#x2F;2013&#x2F;02&#x2F;11&#x2F;atomic-weapons-the-c-memor...</a>
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cesaref超过 4 年前
The most annoying aspect of lock free programming is the amount of &#x27;roll your own&#x27; that goes on, and having to inspect this stuff to ensure it&#x27;s got a chance of working on the platforms you care about.<p>I totally get that this technique is inappropriate for many situations where a lock works well enough, but I work in a field (audio) where accidental use of locks and system calls is in general a larger problem than incorrect lock free code.
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jnwatson超过 4 年前
This is common knowledge in embedded circles, where weak memory models are the norm.<p>This article doesn&#x27;t address a different kind of memory weakness in <i>some</i> ARM implementations (and I presume other architectures) that you can run into when sharing memory between processes.<p>The data cache is virtually tagged, virtually indexed, which means that the cache is keyed with the domain (essentially the process number) + the virtual address. This means that the MMU doesn&#x27;t have to be consulted for cache lookups, however, if you have two different processes mapped into the same physical memory, the writing process must execute a flush instruction, and the reading process must execute an invalidate instruction.
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alvarelle超过 4 年前
&gt; ... std::atomic&lt;bool&gt;. This tells the compiler not to elide reads and writes of this variable, ...<p>If I&#x27;m not mistaken, this is not true. The compiler is still allowed to elide reads and writes on atomic variables. (For example merge two consecutive writes, or remove unused reads)
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xmodem超过 4 年前
Aside - calling it now - but the M1&#x27;s x86 memory model mode is a temporary thing that&#x27;ll go away in a few years along with Rosetta 2 once Apple is happy with the level of universal binary support.
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JoeAltmaier超过 4 年前
Very educational.<p>I take exception with the common assertion that &#x27;code is broken&#x27; if it doesn&#x27;t work everywhere for every architecture. Code deployed for a particular purpose on a particular machine with a particular toolchain can work great and be &#x27;correct&#x27; for that environment. I work in such environments all the time. And taking the time&#x2F;performance hit seeking ill-conceived perfection wastes the clients time and money.<p>But for the vast majority of cloud-deployed or open-source prjects, its certainly wise to err on the side of &#x27;perfect&#x27;.
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vbezhenar超过 4 年前
What I&#x27;m afraid is with the introduction of ARM desktops, there will be subtle bugs which did not manifest on x86. Those bugs are hard to find in old legacy multi-million LoC codebase with lots of spaghetti code nobody bothered to refactor, so those bugs will haunt users for years. That&#x27;s why I&#x27;m reluctant to move to this architecture at least for a few years, even if it&#x27;s superior in theory.<p>Thankfully ARM phones were a thing for a lot of time, so many libraries should work well.
fulafel超过 4 年前
Piggybacking this question for people interested in the topic:<p>Which everyday high level data structures you use are built on lock-free implementations?<p>Clojure&#x27;s maps&#x2F;vectors (which are persistent data structures) come to mind for me, for one.
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jhallenworld超过 4 年前
I thought barriers were required on x86 also. There are a few cases where ordering is not guaranteed. [Also the consumer should have a barrier between the test and the data read.]<p><a href="https:&#x2F;&#x2F;bartoszmilewski.com&#x2F;2008&#x2F;11&#x2F;05&#x2F;who-ordered-memory-fences-on-an-x86&#x2F;" rel="nofollow">https:&#x2F;&#x2F;bartoszmilewski.com&#x2F;2008&#x2F;11&#x2F;05&#x2F;who-ordered-memory-fe...</a><p>The thing that&#x27;s nice about x86 is that DMA is cache coherent- this is true for backwards compatibility with very old hardware.
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andy_threos_io超过 4 年前
Lock-Free programming is essential in high performance networking (10G+ network connections) and data communications. Most of the implementation are using ringbuffers. There can be multiple producer consumer implementation as well.<p>But it&#x27;s not a real issue for the new M1 minis as its network is down to 1Gbit (from the previous mini 10G).
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KingMachiavelli超过 4 年前
Does Rust and it&#x27;s borrow checker make this easier&#x2F;implicit?<p>If compiled code will have to work on both RISC and CISC for the near future. Is the burden to do lock free C++ by identifying all the memory conditions outway the learning curve of Rust?<p>Don&#x27;t know Rust beyond dead simple projects but just curious.
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marcan_42超过 4 年前
This reminds me of some lock-free code I fixed recently (by introducing a very peculiar kind of lock):<p><a href="https:&#x2F;&#x2F;github.com&#x2F;Ardour&#x2F;ardour&#x2F;blob&#x2F;master&#x2F;libs&#x2F;pbd&#x2F;pbd&#x2F;rcu.h" rel="nofollow">https:&#x2F;&#x2F;github.com&#x2F;Ardour&#x2F;ardour&#x2F;blob&#x2F;master&#x2F;libs&#x2F;pbd&#x2F;pbd&#x2F;rc...</a><p>The goal of the code is to allow a producer thread to update a pointer to an object in memory, which may be used lazily by consumer threads. Consumers are allowed to use stale versions of the object, but must not see inconsistent state. Obsolete objects must eventually be freed, but only after all consumers are done using them. And here&#x27;s the catch: consumers are real-time code, so they must never block on a lock, nor are they allowed to free nor allocate memory on their own.<p>The design is based around Boost&#x27;s shared_ptr, so that had to stay. But the original code was subtly broken: the object is passed around by passing a pointer to a shared_ptr (so double indirection there) which gets cloned, but there was a race condition where the original shared_ptr might be freed by the producer while the consumer is in the process of cloning it.<p>My solution ended up being to introduce a &quot;lopsided spinlock&quot;. Consumers aren&#x27;t allowed to block, but producers are. So consumers can locklessly signal, via an atomic variable, that they are currently inside their critical section. Then the producer can atomically (locklessly) swap the pointer at any time, but <i>must</i> spin (is this a half-lock?) until no consumers are in the critical section before freeing the old object. This ensures that any users of the old pointer have completed their clone of the shared_ptr, and therefore freeing the old one will no longer cause a use-after-free. Finally, the producer holds on to a reference to the object until it can prove that no consumers remain, to guarantee that the memory deallocation always happens in producer context. shared_ptr then ensures that the underlying object lives on until it is no longer needed.<p>It&#x27;s kind of weird to see a half-spinlock like this, where one side has a &quot;critical section&quot; with no actual locking, and the other side waits for a &quot;lock&quot; to be released but then doesn&#x27;t actually lock anything itself. But if you follow the sequence of operations, it all works out and is correct (as far as I can tell).<p>For various reasons this code has to build with older compilers, hence can&#x27;t use C++ atomics. That&#x27;s why it&#x27;s using glib ones.<p>(Note: I&#x27;m not 100% sure there are no hidden allocations breaking the realtime requirement on the reader side; I went into this codebase to fix the race condition, but I haven&#x27;t attempted to prove that the realtime requirement was properly respected in the original code; you&#x27;d have to carefully look at what shared_ptr does behind the scenes)
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bullen超过 4 年前
As long as this code runs fine on ARM we&#x27;re going to be ok:<p><a href="http:&#x2F;&#x2F;move.rupy.se&#x2F;file&#x2F;atomic.txt" rel="nofollow">http:&#x2F;&#x2F;move.rupy.se&#x2F;file&#x2F;atomic.txt</a>
mlindner超过 4 年前
This guy is a member of Antifa. I&#x27;m not a fan of people reposting articles by known left-wing terrorist organizations on hacker news.
signa11超过 4 年前
previously : <a href="https:&#x2F;&#x2F;news.ycombinator.com&#x2F;item?id=25255113" rel="nofollow">https:&#x2F;&#x2F;news.ycombinator.com&#x2F;item?id=25255113</a>
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ncmncm超过 4 年前
The importance and value of lock-free programming is <i>massively</i> overrated.<p>I routinely improve performance and also reliability of systems by deleting lock-free queues. The secret to both is reduced coupling, which lock-free methods do nothing to help with. Atomic operations invoke hardware mechanisms that, at base, are hardly different from locks. While they won&#x27;t deadlock by themselves, they are so hard to get right that failures equally as bad as deadlocking are hard to avoid.<p>So, replace threads with separate processes that communicate via ring buffers, and batch work to make interaction less frequent. With interaction infrequent enough, time spent synchronizing, when you actually do it, becomes negligible.
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