Interesting. Anyone knows what's the benefit of TL-Verilog compared to a next gen HDL like nmigen?<p>Robert Baruch used it extensively for his own RISC-V CPU implementation. Its channel is well worth watching for those interested in CPU design.<p><a href="https://www.youtube.com/c/RobertBaruch/videos" rel="nofollow">https://www.youtube.com/c/RobertBaruch/videos</a>