The way to close the gap is incompatible with the way we're all used to programming. Alternative computing architectures are required to get there.<p>Imagine a RISC CPU with a chunk of Static RAM, running slow (100 Mhz), and synchronously, with no need for any of the usual tweaks like cache, pipelines, branch prediction, etc. Such a CPU would be very small, and if you sized the RAM correctly, you could put all of it into a grid that would more than make up for the slow clock rate, and still be fairly low power.<p>In the end, though, I think we'll end up programming arrays of 4x4 bit look up tables that talk to their neighbors. But not directly, through a few layers of optimizing compilers. The advantage is that it could be fast, fault tolerant, and would all run in parallel. You could compute as fast as you could shovel data in one end, and out the other.