Well, the video does not show the ppl actually designing the blueprint of the machine and doing the R&D, the real brains... we are showed mostly assembly workers (all above averagely skilled), customer service operators, etc.<p>I was surprised to agree with most of what ASML bosses said, and I would have given exactly the same answer than the assembly operator, namely not providing any timeline... because it is complete garbage to do so on so much complex machines, not to mention the machine is a prototype, then the first one. I may have answered "yesterday".<p>But noway they will make me use a doz computer, or an android phone...<p>I am _seriously_ curious on how they want to get their pitch below 7nm with a 13.6nm EUV light. Do they plan to go massive multi-patterning with sub-nm xray positioning? For below 7nm pitch, what would they use: xray light? electron/ion beams? pattern printing? And what about the purity of the wafer dopped silicon for smaller features? xray light: what materials to use?? Quantum interference tricks?<p>I wonder how many silicon atoms from a wafer crystal we have on a 1nm row...<p>All that is to get chips which consume less energy, get faster telecom, play magnificient games, store more in flash ram.