This is a pipelined hardware implementation of the DCPU-16 cpu designed by @notch for his new game 0x10c in Verilog RTL.<p>It is written entirely in RTL Verilog and is fully synthesisable. While basically functional, there is still plenty of room for improvement.<p>Took me a few days of hacking to get it out. I was only focused on functionality so there is plenty of room to reduce chip resource usage - primarily in the EA calculator.<p>I will still continue to work on it in the short term to iron out any kinks.