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Zen 5's AVX-512 Frequency Behavior

213 点作者 matt_d3 个月前

7 条评论

Remnant443 个月前
It&#x27;s interesting that Zen5&#x27;s FPUs running in full 512bit wide mode doesn&#x27;t actually seem to cause any trouble, but that lighting up the load store units does. I don&#x27;t know enough about hardware-level design to know if this would be &quot;expected&quot;.<p>The fully investigation in this article is really interesting, but the TL;DR is: Light up enough of the core, and frequencies will have to drop to maintain power envelope. The transition period is done very smartly, but it still exists - but as opposed to the old intel avx512 cores that got endless (deserved?) bad press for their transition behavior, this is more or less seamless.
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kristianp3 个月前
I find it irritating that they are comparing clock scaling to the venerable Skylake-X. Surely Sapphire Rapids has been out for almost 2 years by now.
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menaerus3 个月前
I don&#x27;t understand why 2x FMAs in CPU design poses such a challenge when GPUs literally have hundreds of such ALUs? Both operate at similar TDP so where&#x27;s the catch? Much lower GPU clock frequency?
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Szpadel3 个月前
I&#x27;m curious how changing some OC parameters would affect those results if that it caused by voltage drop, how load line calibration affects it? is that&#x27;s power constraint then how PBO would affect it?
sylware3 个月前
They should put forward the fact that 512bits is the &quot;sweet spot&quot; as it is a data cache-line!
mgaunard3 个月前
In practice everyone turns off AVX512 because they&#x27;re afraid of the frequency throttling.<p>The damage was made by Skylake-X and won&#x27;t be healed for years.
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ksec3 个月前
I wonder if this will be improved or fix in Zen 6. Although personally I much rather they focus on IPC.
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