It's important to note that "twice the speed" refers to transfer speed, not latency or cycle time. Modern DRAM technology has capped out at a cycle time of about 30MHz, and isn't going to change much in the future. That time is limited by the time required to precharge the bit lines to a voltage accurate enough to measure the stored values against. These are big wires going across the whole chip by definition, so they don't see improvements due to process shrinkage. On a modern DDR3-1600 part, there are 1.6G potential transfers per second, but a full random access cycle requires about 60 of these (10-10-10-30 timings are typical). The time taken to issue the command is 2 clocks, and the time taken to read the data is 4. The rest is just idle waiting. So even "infinitely clocked" dram would be only about 10% faster in the worst case.