Obligatory anti STM hype links:<p><a href="http://queue.acm.org/detail.cfm?id=1454466" rel="nofollow">http://queue.acm.org/detail.cfm?id=1454466</a>
<a href="http://webcache.googleusercontent.com/search?q=cache:HhZcU_jucksJ:www.bluebytesoftware.com/blog/2010/01/03/ABriefRetrospectiveOnTransactionalMemory.aspx+&cd=1&hl=en&ct=clnk&gl=us" rel="nofollow">http://webcache.googleusercontent.com/search?q=cache:HhZcU_j...</a><p>Pretty much all the generalized (not functional) memory TM schemes with adequate performance rely on hardware acceleration. If your design doesn't support that your design is wrong.