ARM immediate value encoding

Thumb-2 immediate encoding is even more gleeful--in addition to allowing rotation, it also allows for spaced repetition of any 8-bit pattern (common in low level hack patterns, like from [1]) to be encoded in single instructions.<p>For those interested, check out page 122 of the ARMv7-M architecture reference manual[2]:<p><pre><code> &#x2F;&#x2F; ThumbExpandImm_C() &#x2F;&#x2F; ================== (bits(32), bit) ThumbExpandImm_C(bits(12) imm12, bit carry_in) if imm12&lt;11:10&gt; == ’00’ then case imm12&lt;9:8&gt; of when ’00’ imm32 = ZeroExtend(imm12&lt;7:0&gt;, 32); when ’01’ if imm12&lt;7:0&gt; == ’00000000’ then UNPREDICTABLE; imm32 = ’00000000’ : imm12&lt;7:0&gt; : ’00000000’ : imm12&lt;7:0&gt;; when ’10’ if imm12&lt;7:0&gt; == ’00000000’ then UNPREDICTABLE; imm32 = imm12&lt;7:0&gt; : ’00000000’ : imm12&lt;7:0&gt; : ’00000000’; when ’11’ if imm12&lt;7:0&gt; == ’00000000’ then UNPREDICTABLE; imm32 = imm12&lt;7:0&gt; : imm12&lt;7:0&gt; : imm12&lt;7:0&gt; : imm12&lt;7:0&gt;; carry_out = carry_in; else unrotated_value = ZeroExtend(’1’:imm12&lt;6:0&gt;, 32); (imm32, carry_out) = ROR_C(unrotated_value, UInt(imm12&lt;11:7&gt;)); return (imm32, carry_out) </code></pre> [1] <a href="http://graphics.stanford.edu/~seander/bithacks.html" rel="nofollow">http:&#x2F;&#x2F;graphics.stanford.edu&#x2F;~seander&#x2F;bithacks.html</a> (worth a read on its own if you&#x27;re into this kind of thing)<p>[2] <a href="http://web.eecs.umich.edu/~prabal/teaching/eecs373-f10/readings/ARMv7-M_ARM.pdf" rel="nofollow">http:&#x2F;&#x2F;web.eecs.umich.edu&#x2F;~prabal&#x2F;teaching&#x2F;eecs373-f10&#x2F;readi...</a> (no-registration link)

The set of representable ARM immediates is really nice. It&#x27;s wonderfully useful for writing soft-float and math library routines, where you have very common values with just some high-order bits set:<p><pre><code> 0x3f800000 &#x2F;&#x2F; encoding of 1.0f </code></pre> The set of immediate encodings, together with &quot;shifts for free on most operations&quot; (which are closely related features, as the OP points out), went a long way toward preserving my sanity when writing assembly.<p>Worth noting: thumb-2 immediates have a different (and even more interesting) encoding scheme. arm64 immediates are pretty interesting too (there the set of representable immediates is different depending on the instruction domain).

The Tensilica guys took this thing an extra step. ie- profile real code to find out what constants are most typically used, enumerate the top n constants, encode the constant with 0..n-1 in the immediate instruction - the immediate value is a hardware based lookup. You can still do arbitrary immediates with longer instructions but you can apparently get some nice code size reductions using this technique.

Holy crap. ARM&#x27;s encoding makes so much sense... compared to what I have waded through at sandpile.org.

This encoding is nice given that they&#x27;ve already paid the price of having the 32b barrel shifter, but it was a non-obvious choice to have the barrel shifter to begin with. Most instructions don&#x27;t benefit from the optional rotate, but they pay the price in the encoding and in the data path.<p>Interestingly, the website uses svg for illustrations, IE 8 and under be damned.

I was left with one question after reading the article: the purpose of the condition field in the instruction.

Very cool and clever scheme. But what happens to immediates that can&#x27;t be encoded that way?

Article begins by praising RISC as &quot;elegant&quot; and &quot;a good design decision&quot;, goes on to describe limitations of RISC immediate values.

I agree that this clever and useful, but I get the feeling that it could have been more so.<p>I haven&#x27;t done much assembly in a while, but I was heavily into it once upon a time, and I recall that values with lots of 1s were useful. There is not quick way to generate those here. This means that we can write a single instruction to set any single bit using an inclusive OR and the proper immediate value, but we cannot write a single instruction to <i>clear</i> any single bit.<p>The reason I think a bit more cleverness might have helped is that there are so many values with multiple encodings. Anything where the 8-bit value ends with 0 has a different encoding as well. For example, a rotation of 0000 and an 8-bit value of 00000100 gives the same result as a rotation of 1111 and an 8-bit value of 00000001 (right?). Perhaps some of the redundant instructions could have been used to represent things ending in lots of 1s?<p>Regardless, an interesting and informative post. :-)

I love that the author described the ARM as &quot;elegant, pragmatic, and quirky.&quot; It reminds me of Gordon Bell&#x27;s PCP-6&#x2F;PDP-10 architecture, but applied to the RISC rather than CISC philosophy.<p>(well, the PDP-10 was pretty RISC for its day and gave us things like BLT, hence bitblit).

So arm compilers must prefer to, for example, XOR with 0x10000000 rather than AND with 0xEFFFFFFF?

This is clever. However...<p>The problem as I see it with this sort of cleverness is that it&#x27;s difficult to optimize to this. It leads to quite variable best-case and worst-case scenarios and general unpredictability. As, say, a C programmer and not a compiler designer, you might unintentionally pick lots of values that won&#x27;t fit into the &quot;immediate&quot; scheme (worst-case). Or you might force your design to use numbers that DO fit into this scheme (best-case, but a bleed of lower-level design decisions affecting higher-level design decisions).

Why is this cool and clever? It still only encodes 12 bits of data, it is just different to using the normal 12 bits of data.<p>Is this a more useful subset? I am guessing it is so, since they went to this trouble.

If I&#x27;ve interpreted this correctly, it means that all values between 256 and 65535 can&#x27;t be encoded this way since they all have the form<p>0x0000nn00<p>with a nonzero nn, and those are the bits that can&#x27;t be gotten to from rotating.

Nice but somewhat obsolete I think: AFAIK the ARMv8 (64bit) ISA is different..

THAT Barrel Shifter, son!