MyHDL – Design hardware with Python – Examples

I&#x27;ve recently started writing my own HDL as an embedded language within Idris. The idea behind it is that you can take advantage of the rich type system and you have the option to prove theorems about your circuits to gain confidence in them. There are also bindings to picosat, so that you can automatically prove some properties. Here&#x27;s a snippet of how it looks so far (though things are changing rapidly):<p><pre><code> lt : BoolOperation op =&gt; Vect n v -&gt; Vect n v -&gt; SSA op v v lt [] [] = constOp False lt (x :: xs) (y :: ys) = do nX &lt;- notOp x t1 &lt;- andOp [nX, y] t2 &lt;- xnorOp x y t3 &lt;- lt xs ys t4 &lt;- andOp [t2, t3] orOp [t1, t4]</code></pre>

There is so much potential in open source hardware design.<p>Right now, we are held back by (at best) mediocre tools. We need better HDL software, better synthesis software, better EDA software before we have any hope of widespread use of open source hardware.<p>Imagine if the only compilers available were proprietary compilers locked behind hundreds of pages of licensing requirements and legal bullshit. Open source software would still be in the dark ages.<p>I applaud any effort to advance the open source hardware design toolset.

Always great to see new developments in HDLs.<p>It seems there is no synthesis (which is to be expected without vendor support). With &#x27;limited&#x27; conversion to VHDL&#x2F;Verilog, I wonder how useful this is for actual implementation.<p>Also from the site I couldn&#x27;t find any mention of higher level functionality such as generics, etc.

I don&#x27;t know, i&#x27;ve been working with VHDL for 5 years and i don&#x27;t see how this could be useful.<p>Usually we first develop our algorithms using fixed point math at Matlab, which is a piece of cake.<p>After doing this, developing our VHDL based on Matlab implementation is very straight forward.<p>Python language isn&#x27;t a very common knowledge for people developing hardware, so they really need to learn a complete new language made to another domain (software) in order to do the same thing!<p>VHDL&#x2F;Verilog has been used for 30 years and in my opinion will continue to be used for many mores, Python&#x27;s language structure just doesn&#x27;t have what&#x27;s needed to the hardware domain.<p>I see myself wasting a lot of time having to teach our old hardware guys Python and how to think in terms of RTL with a new Language. That&#x27;s why i didn&#x27;t try to switch.<p>Remember, most of the engineers working with hardware come from EE background, not CS. They are more familliar with Schematics than C.

A related project is Chisel, in which you create language using Scala: <a href="https://chisel.eecs.berkeley.edu/" rel="nofollow">https:&#x2F;&#x2F;chisel.eecs.berkeley.edu&#x2F;</a>

Related project : <a href="https://github.com/m-labs/migen" rel="nofollow">https:&#x2F;&#x2F;github.com&#x2F;m-labs&#x2F;migen</a>

I like this. I keep saying there&#x27;s a hardware renaissance near by and I think the wider-spread use of HDL and the like will help along with this.